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Method for optimizing performance of vanadium oxide thin film through low valent vanadium seed layer

A technology of vanadium oxide thin film and seed layer, applied in coating, ion implantation plating, metal material coating process, etc., can solve the problems of poor film performance and complex process, achieve low preparation temperature, good process compatibility, Effect of annealing temperature reduction

Active Publication Date: 2018-09-28
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The invention provides a method for optimizing the performance of vanadium oxide film by adopting a low-valent vanadium seed layer, so as to solve the technical problems of complex process and poor film performance existing in the existing vanadium oxide film preparation technology

Method used

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  • Method for optimizing performance of vanadium oxide thin film through low valent vanadium seed layer
  • Method for optimizing performance of vanadium oxide thin film through low valent vanadium seed layer
  • Method for optimizing performance of vanadium oxide thin film through low valent vanadium seed layer

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Embodiment 1

[0034] Such as figure 1 As shown, the method for optimizing the performance of the vanadium oxide thin film using a low-valent vanadium seed layer provided in this embodiment includes the following steps:

[0035] (1) Using Al 2 o 3 Substrate: Al 2 o 3 Put the substrate in acetone for 30 minutes to remove surface impurities, then put it in absolute ethanol for 30 minutes to remove residual acetone, and finally put it in absolute ethanol for storage. 2 blow dry;

[0036] (2) Using magnetron sputtering technology on Al 2 o 3 The vanadium oxide thin film is prepared on the substrate, and the specific process conditions are:

[0037] Target material: metal vanadium target; background vacuum degree: less than 2×10 -3 Pa; Sputtering temperature: 60±1°C; Ar flow rate during sputtering: 98 sccm; O during the first sputtering process 2 Flow rate: 0.5sccm, the first sputtering time is 1min; during the second sputtering process, O 2 Flow rate: 1sccm, the second sputtering time ...

Embodiment 2

[0042] Other conditions remain the same, and the first sputtering process of (2) in 1 will be implemented in detail. 2 The flow rate is changed to: 0.4sccm, the phase transition amplitude of the prepared vanadium oxide film is 464 times, the loop width is 8.63°C, and the phase transition temperature is 60°C. Although the phase transition amplitude is lower than that of the film under the condition of 0.5sccm, but The loop width and the phase transition temperature are both smaller, indicating that the performance of the vanadium oxide film can be adjusted by changing the ratio of argon to oxygen for making the seed layer.

[0043] Such as image 3 Shown is the graph of the square resistance temperature characteristic curve of the vanadium oxide thin film prepared in this embodiment.

Embodiment 3

[0045] Other conditions remain unchanged, the first sputtering time in (2) in the specific embodiment one is changed to: 2min, the phase transition amplitude of the prepared vanadium oxide film is 423 times, the loop width is 5.37°C, and the phase transition temperature is 55.88°C ℃. Although the phase transition amplitude is not as large as before, the loop width and phase transition temperature are further reduced, indicating that adjusting the thickness of the seed layer can change the properties of the vanadium oxide film.

[0046] Such as Figure 4 Shown is the graph of the square resistance temperature characteristic curve of the vanadium oxide thin film prepared in this embodiment.

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Abstract

The invention discloses a method for optimizing the performance of a vanadium oxide thin film through a low valent vanadium seed layer, and relates to the field of electronic materials. The method adopts a magnetron sputtering technology, vanadium metal is used as a target, Al2O3 is used as a substrate, sputtering is conducted in the aerobic environment in twice, the oxygen concentration of the first time of sputtering is lower than that of the second time of sputtering, the low valent vanadium seed layer and the vanadium oxide thin film are sequentially obtained through the two times of sputtering correspondingly, and finally the vanadium oxide thin film optimized with the low valent vanadium seed layer is obtained through annealing. The prepared vanadium oxide thin film with the low valent vanadium seed layer has high phase change amplitude and small return wire width and is closer to the room temperature phase change temperature, and thus the sensitivity, stability, reliability andapplication prospects of thermotropic switch modulation devices are improved; and in addition, the annealing temperature required by preparation of the phase change vanadium oxide thin film through the method can be remarkably lowered, the process compatibility with an MEMS is better, and the method is suitable for batch production.

Description

technical field [0001] The invention relates to the field of electronic materials, in particular to a method for optimizing the performance of a vanadium oxide film by using a low-valent vanadium seed layer. Background technique [0002] In 1959, Morin, a scientist at Bell Laboratories in the United States, discovered through experiments that certain vanadium oxides can have very special characteristics: within a certain temperature range, as the temperature continues to rise, vanadium oxide will change from There is a sudden transition from semiconducting to metallic properties, and, within the vanadium oxide material, there is also a tendency for the crystal structure to transform towards a less symmetrical structure. Vanadium oxides of different valence states have different phase transition temperatures, among which VO 2 The phase transition temperature is relatively close to room temperature around 68°C, and has very prominent phase transition characteristics. Before ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C23C14/35C23C14/08C23C14/58C23C14/02
CPCC23C14/0036C23C14/024C23C14/083C23C14/35C23C14/5806
Inventor 吴志明张帆姬春晖向梓豪杨仁辉
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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