Analog circuit fault diagnosis method based on chaos cloud model adaptive firefly algorithm

A technology for simulating circuit faults and firefly algorithm, which can be used in analog circuit testing, calculation models, electronic circuit testing, etc., and can solve problems such as low fault diagnosis rate, local optimization, and repeated oscillations

Active Publication Date: 2018-11-16
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

Therefore, an intelligent algorithm is used to optimize its parameters, but the intelligent algorithm has a certain degree of randomness when the population is initialized, and it is easy to b...

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  • Analog circuit fault diagnosis method based on chaos cloud model adaptive firefly algorithm
  • Analog circuit fault diagnosis method based on chaos cloud model adaptive firefly algorithm
  • Analog circuit fault diagnosis method based on chaos cloud model adaptive firefly algorithm

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[0072] like image 3 As shown, in order to verify the validity and feasibility of the scheme of the present invention, a relatively complex quadratic high-pass filter with four operational amplifiers in the circuit is selected as the circuit under test. The parameter values ​​of each component are their nominal values, and the allowable errors in the components are: the resistance tolerance range is ±5%X n , capacitance tolerance is ±10% x n , X n is the nominal value of the component. According to the sensitivity analysis, it can be seen that R1, R2, R3, R4 and C1, C2 have the most significant response to the circuit output, so they are taken as the faulty component group. Apply the test stimulus as a single-cycle pulse signal with an amplitude of 5V and a pulse width of 10μs, conduct Monte-Carlo analysis 100 times for each fault state of the circuit time-domain voltage signal, and acquire 1000 each time within the first 400us of the test response Sampling point. Table 1...

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Abstract

The present invention discloses an analog circuit fault diagnosis method based on a chaos cloud model adaptive firefly algorithm. The method comprises the steps of: applying a certain test stimulus toa tested circuit, and collecting output response signals of the tested circuit at a measurable node of the circuit; employing the wavelet fusion method to perform extraction of a circuit fault feature set from the output response signals; employing the CCAFA-LSSVM (Chaos Cloud Model Adaptive Firefly Algorithm-Least Squares Support Veotor Maohine) to perform fault diagnosis of the fault feature set to achieve classification and location operation of the circuit faults. The analog circuit fault diagnosis method employs a cloud model with a capacity of processing object fuzziness and randomnessto perform corresponding improvement of the firefly algorithm and allow the firefly algorithm to have a good generalization ability and a high robustness. Therefore, when the fault diagnosis is performed, the resolution ratio of the fault mode is high, the diagnosis performance is good, and the fault elements can be accurately located, and the diagnosis performance and the efficiency of the testedanalog circuit can be improved.

Description

technical field [0001] The invention relates to the field of analog circuit fault diagnosis, in particular to an analog circuit fault diagnosis method, in particular to an analog circuit fault diagnosis method using a chaotic cloud self-adaptive firefly algorithm. Background technique [0002] With the rapid development of integrated circuits (Integrated Circuit, referred to as IC), the complexity and density of circuits are constantly increasing. Now digital, analog and mixed signal circuits are integrated into ICs on the same substrate to form SoC (System -on-a-Chip, system-on-a-chip, referred to as SoC) and NoC (Network On Chip, network on chip, referred to as NoC). Digital circuits such as memories and controllers belong to digital IP (Intellectual Property, intellectual property, referred to as IP) cores, because they have complete test standards such as IEEE 1149.1 standards and IEEE 1500 standards, as well as their discrete output characteristics, making them Testabi...

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Application Information

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IPC IPC(8): G01R31/316G06N3/00
CPCG01R31/316G06N3/006
Inventor 谈恩民王存存
Owner GUILIN UNIV OF ELECTRONIC TECH
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