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Integrated resistive memory and a preparation method thereof

A technology of resistive variable memory and resistive variable layer, which is applied in the direction of electrical components, etc., can solve the problems of complex manufacturing process, inability to adapt to the development trend of integrated resistive variable memory, and high manufacturing cost, so as to improve storage density, facilitate large-scale manufacturing, The effect of increasing storage density

Active Publication Date: 2019-01-22
XI'AN UNIVERSITY OF ARCHITECTURE AND TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

With the reduction and integration of the characteristic size of the resistive memory device, the manufacturing process of this integrated structure becomes more and more complicated, and the corresponding manufacturing cost is also higher and higher, which cannot adapt to the development trend of integrated resistive memory.

Method used

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  • Integrated resistive memory and a preparation method thereof
  • Integrated resistive memory and a preparation method thereof
  • Integrated resistive memory and a preparation method thereof

Examples

Experimental program
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Effect test

preparation example Construction

[0042] Please refer to image 3, a method for preparing an integrated resistive memory of the present invention, comprising the following steps:

[0043] Step 1, apply the liquid PMMA embossing adhesive material on the surface of the non-conductive substrate 1 by centrifugal glue spreading, glue spraying or screen printing, and evenly distribute the embossing layer 2 on the surface of the substrate 1;

[0044] Step 2, using a magnetron sputtering process to sputter-deposit the surface of the PMMA imprinting glue on the silicon wafer substrate 1 to form a bottom electrode layer 3 structure of a conductive metal;

[0045] Step 3, apply the liquid PMMA embossing adhesive material to the surface of the conductive metal bottom electrode layer by centrifugal glue laying, glue spraying or screen printing, and evenly distribute the isolation layer 4 on the surface; the thickness of the bottom electrode layer 3 is about 100nm;

[0046] Step 4, using a three-layer composite thermal em...

Embodiment 1

[0051] A method for preparing a single-layer integrated resistive variable memory of the present invention comprises the following steps:

[0052] (1) Apply the liquid embossing adhesive material on the surface of the silicon dioxide insulating layer by centrifugal glue laying, glue spraying or screen printing, and evenly distribute the embossing layer 2 on the surface of the silicon dioxide insulating layer.

[0053] (2) Using a magnetron sputtering process, sputtering deposits the embossing glue on the silicon wafer substrate to form a layer of conductive metal as the bottom electrode layer 3 .

[0054] (3) Apply the liquid PMMA embossing adhesive material to the surface of the conductive metal bottom electrode layer structure 3 by centrifugal glue laying, glue spraying or screen printing, and evenly distribute the isolation layer 4 on the bottom electrode layer structure 3; The thickness of the metal bottom electrode layer is about 100 nm.

[0055] (4) Using a three-layer ...

Embodiment 2

[0059] A method for preparing a multi-layer integrated resistive variable memory of the present invention, the preparation method is based on Example 1, and steps 2 and 3 can be repeated for the required number of layers; the metal bottom electrode layer and the metal bottom electrode layer are repeatedly stacked on the isolation layer. The isolation layer can form 1-100 multi-layer RRAM on the substrate at one time to obtain a multi-layer integrated resistive variable memory.

[0060] An integrated resistance variable memory (RRAM) preparation method of the present invention adopts a three-layer composite thermal embossing technology, and can be extended to manufacture multi-layer and integrated RRAM. The single-layer RRAM structure mainly includes a substrate, an embossing layer, a bottom electrode layer, an isolation layer, a resistive switch layer, and a top electrode layer; the material of the substrate is silicon dioxide or glass; the material of the embossing layer and t...

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Abstract

The invention discloses an integrated resistive memory and a preparation method thereof, comprising a substrate, an imprint layer, a bottom electrode layer, an isolation layer, a resistive layer and atop electrode layer. The material of the substrate is silicon dioxide sheet or glass; The material of the imprint layer and the spacer layer is polymethyl methacrylate or polystyrene material; The metal conductive layer is made of silver or gold; The resistive layer penetrates the isolation layer and the bottom electrode layer to a certain depth to the imprint layer; The resistive layer materialis hafnium oxide or copper oxide; The top electrode layer is aluminum or platinum. The preparation method provided by the invention does not need to use the traditional photolithography process technology, has simple manufacturing process and low investment in equipment and raw materials, can realize large area, multi-layer, good consistency and integrated manufacturing of RRAM, and can remarkablyreduce the cost of integrated manufacturing process of RRAM.

Description

technical field [0001] The invention belongs to the technical field of resistive variable memory (RRAM), in particular to an integrated resistive variable memory and a preparation method thereof. Background technique [0002] With the rapid development of information technology, more and more intelligent electronic devices have entered people's lives. While enjoying the various conveniences brought by these high-tech information products, the requirements for the information storage capacity of the products are getting higher and higher. The advantages of RRAM not limited by feature size become the development direction of next-generation memory. As the carrier of information technology, memory is developing towards high speed, large capacity, high storage density and low power consumption. [0003] At present, the conventional RRAM integrated structure is prepared by using a cross-array integrated structure. With the reduction and integration of the characteristic size o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
CPCH10N70/24H10N70/066
Inventor 叶向东李斌赵毅陈冰李冀蔡安江
Owner XI'AN UNIVERSITY OF ARCHITECTURE AND TECHNOLOGY
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