Semiconductor structures and methods of forming them

Abstract

The invention provides a semiconductor structure and a forming method thereof. The forming method comprises the following steps that a first source-drain groove is formed in a first pseudo-grid structure and first fin parts on the two sides of a first side wall structure separately; a first semiconductor layer is formed on the side walls and the bottom of the first source-drain groove; and a firstsource-drain doping layer for filling the first source-drain groove is formed on the first semiconductor layer. According to the forming method, the first semiconductor layer is formed between the first source-drain doping layer and the first fin parts, so that the risk that junction surface leakage current is generated between the first source-drain doping layer and the first fin parts is reduced, and therefore the electrical stability and reliability of the semiconductor structure are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. Transistors, as the most basic semiconductor devices, are being widely used at present. The control ability of traditional planar transistors on channel current is weakened, resulting in short channel effect and leakage current, which ultimately affects the electrical performance of semiconductor devices. [0003] In order to overcome the short channel effect of the transistor and suppress the leakage current, the prior art proposes a fin field effect transistor (Fin FET), which is a common multi-gate device, and the structure of the fin field effect transistor includes : the fin and the dielectric layer located on ...

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Problems solved by technology

[0004] However, as the density of semiconductor devices increases and the size shrinks, the manufacturing process of fin field effect transistors becomes more difficult, and the performance and reliability of the formed fin field effect transistors deteriorate.

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