FPGA based Displayport signal generating device and method

Abstract

The invention provides an FPGA based Displayport signal generating device. The device includes an AXI Lite parallel image parameter receiving module, an AXI Stream parallel image data receiving moduleand a soft-core processor module; the AXI Lite parallel image parameter receiving module receives the register configuration parameters of Displayport modules; the AXI Stream parallel image data receiving module decodes image data into RGB data according to the types of the Displayport modules and accomplishes the display image screen testing of the Displayport modules; and the soft-core processor module performs the VCOM adjusting and EDID burning of the Displayport modules according to the received register configuration parameters of the Displayport modules. Thus, the VCOM adjusting and EDID burning functions of the Displayport modules can be realized, and all functions can be realized in an FPGA; and a liquid crystal module testing device is high in integration level, so that testingcosts can be saved, testing efficiency and testing reliability can be enhanced, and the production efficiency and product qualified rates of enterprises can be increased.

Description

technical field [0001] The invention relates to the technical field of display and testing of liquid crystal modules, in particular to an FPGA (Field-Programmable Gate Array, Field Programmable Gate Array)-based Displayport graphics signal generation device and method. Background technique [0002] LCD (Liquid Crystal Display, liquid crystal display) has the advantages of light and thin, low power consumption, low radiation, no flicker on the screen, and rich colors; the liquid crystal module is a key component of the LCD, and the internal interconnection signal of the traditional liquid crystal module usually adopts LVDS (Low -Voltage Differential Signaling, low-voltage differential signal transmission) interface, but the LVDS interface can only support lower resolutions. In order to meet the increasing demand for display resolution, the Displayport interface has appeared on the market. The Displayport interface can not only support ultra-high resolution and refresh rate, ...

AI Technical Summary

Problems solved by technology

[0004] (1) Existing test devices generally use Displayport dedicated chips when testing Displayport LCD modules, and the Displayport dedicated chips on the market only support the Displayport v1.1 protocol and cannot support ultra-high resolutions such as 3840x216060Hz

[0005] (2) Since the FPGA and the Displayport dedicated chip are separated, there will be a large number of signal connection lines between the FPGA and the Displayport dedicated chip, especially when multiple Displayport outputs will use multiple Displayport dedicated chips, which not only greatly increases PCB (Printed Circuit Board, printed circuit board) wiring difficulty, also increases the manufacturing cost

[0006] (3) The Displayport dedicated chip only meets the fixed three rates stipulated in the Displayport protocol, but cannot meet the special rate and custom rate for low-power devices in the eDP (embedded Displayport) protocol

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