Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A planar gate igbt device with deep trench electric field shielding structure

A technology of electric field shielding and planar gate, which is applied in the direction of electrical components, semiconductor devices, circuits, etc., can solve the problems of excessive gate drive charge, small short-circuit safe working area, and limited concentration of CSL layer

Active Publication Date: 2021-02-02
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to propose a novel carrier storage layer for the problems of excessive gate drive charge, small short-circuit safe working area and limited CSL layer concentration of the existing slot gate IGBT with carrier storage layer. Planar Gate IGBT

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A planar gate igbt device with deep trench electric field shielding structure
  • A planar gate igbt device with deep trench electric field shielding structure
  • A planar gate igbt device with deep trench electric field shielding structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0030] This embodiment provides a planar gate IGBT device with a carrier storage layer, the cell structure of which is as follows figure 1 as shown,

[0031] N-type lightly doped region 1 as a withstand voltage region;

[0032] An N-type carrier storage layer 3 disposed on the withstand voltage region 1;

[0033] The N-type JFET region 2 disposed on the N-type carrier storage layer 3 and the P-type base region 6 adjacent thereto;

[0034] N arranged in the base region 6 as the cathode source region + Type heavily doped region 4 and P as the body contact region + heavily doped region 5;

[0035] A plurality of deep grooves with the same structure deep into the voltage-resistant region 1 arranged on the upper surface of the semiconductor region, the deep grooves penetrate through the body contact region 5, the P-type base region 6 and the N-type carrier storage layer 3, and The N-type carrier storage layer 3 between the deep grooves is replaced by an N-type semiconductor r...

Embodiment 2

[0043] This embodiment provides a planar gate IGBT device with a carrier storage layer, the cell structure of which is as follows figure 2 As shown, the schematic diagram of the cut plane along AA' is as follows image 3 shown;

[0044] It differs from Embodiment 1 in that the direction of the channel current is parallel or approximately parallel to the sidewall of the deep trench.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention relates to the field of power semiconductors, and provides a planar gate IGBT device with a deep groove electric field shielding structure, which is used to overcome the excessive gate drive charge and small short-circuit safe working area of ​​the existing groove gate IGBT with a carrier storage layer And the problem of the limited concentration of the CSL layer; the present invention combines the deep groove traditionally used to make the trench gate IGBT channel with the P-type buried layer at the bottom of the groove to form an electric field shielding structure, and realizes the clamping of the potential of the carrier storage layer; Moreover, multiple deep grooves are set in one IGBT cell; thus, the concentration of the carrier storage layer of the IGBT of the present invention can be much higher than that of the traditional IGBT, which can have higher cathode injection efficiency and obtain better turn-on voltage The trade-off relationship between drop and turn-off loss. At the same time, the IGBT of the present invention has lower gate drive power consumption and lower saturation current density due to the adoption of a planar grid and an electric field shielding structure, thereby improving the safe working area of ​​the IGBT.

Description

technical field [0001] The invention relates to the field of power semiconductors, and specifically provides an IGBT device with low turn-on voltage drop, low driving power consumption and fast turn-off characteristics of a high short-circuit safe working area. Background technique [0002] IGBT compromises the low turn-on voltage drop of BJT and the fast switching characteristics of MOSFET, so it is widely used in power electronic systems. According to the structure of the IGBT gate, the IGBT can be divided into two types: the slot gate and the planar gate; the planar gate has low gate drive loss, and the saturation current density is low, and the short-circuit safe operating area is large, but due to the existence of the JEFT region, its The conduction voltage drop is large; the slot gate eliminates the JEFT area, so its conduction voltage drop is small, but due to the large channel density, its gate drive loss is large, and the saturation current density is high, thus sho...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/739H01L29/06H01L29/423
Inventor 易波李平
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products