40 results about "Electric-field screening" patented technology

The application relates to the technical field of field effect transistor devices, and discloses a two-dimensional material field effect transistor and a preparation method thereof. The two-dimensional material field effect transistor comprises a substrate insulating layer, a gate layer, a gate contact electrode, a vertical electric field shielding structure, a second insulating layer and a conductive channel film which are arranged in a stack. A second step and a third step are formed on the side of the conductive channel film away from the second insulating layer; the second step and the third step are arranged along the stacking direction. A first contact electrode is formed on the second step surface through oblique angle deposition, and a second contact electrode is formed on the third step surface through oblique angle deposition; the side surface of the first contact electrode facing the third step is aligned with the end of the second step surface facing the third step. The first contact electrode and the second contact electrode are deposited through the oblique angle deposition mode, the dependence on a photoetching device and a overlay process precision in the development process of the existing field effect transistor is reduced, and the channel length and the gate length are simultaneously micronized.

The present application belongs to the technical field of semiconductors. Disclosed are a silicon carbide power device cell structure and a preparation method therefor, and a semiconductor device. A silicon carbide power device comprises a substrate, source structures, a gate structure, and electric-field shielding structures, wherein the gate structure is disposed in the substrate; the source structures are disposed on the substrate and surround at least part of side faces of the gate structure; and the electric-field shielding structures are disposed in the substrate, surround the bottom of the gate structure and are connected to the source structures. The present application can redistribute to the electric-field shielding structures an electric field of a gate dielectric layer of a silicon carbide semiconductor device cell structure in a reverse blocking state, so as to maximize the shielding effect, thereby reducing the electric field of the gate dielectric layer, such that the semiconductor device has high reliability.

The application discloses a display panel and a display device, relates to the technical field of display, and further relates to an array substrate, a color film substrate, an electric field shielding layer, a shielding electric field insulating layer and a data line arrangement layer. The color film substrate is not provided with a black matrix corresponding to the data line on the side of the array substrate. The electric field shielding layer comprises a plurality of shielding electrodes. The orthographic projection of each shielding electrode on the substrate covers the orthographic projection of each data line on the array substrate body. The shielding electric field insulating layer comprises a first insulating part, a second insulating part and a third insulating part which are sequentially connected. The second insulating part is arranged corresponding to the shielding electrode. The thickness of the second insulating part is greater than the thickness of the first insulating part and the thickness of the third insulating part. The application reduces the pressure difference and improves the transmittance through the above design.

The invention relates to the technical field of field effect transistor devices, and discloses a two-dimensional material field effect transistor and a preparation method thereof. The two-dimensional material field effect transistor comprises a substrate insulating layer, a gate layer, a gate contact electrode, a vertical electric field shielding structure, a second insulating layer and a conductive channel film which are arranged in a stacked mode. A second step and a third step are formed on one side, far away from the second insulating layer, of the conductive channel film; the second step and the third step are arranged in the stacking direction. Forming a first contact electrode on the second step surface through oblique angle deposition, and forming a second contact electrode on the third step surface through oblique angle deposition; one side surface of the first contact electrode facing the third step is aligned with one end of the second step surface facing the third step. The first contact electrode and the second contact electrode are deposited in an oblique angle deposition mode, the dependence on photoetching equipment and overlay process precision in the development process of an existing field effect transistor is reduced, and synchronous miniaturization of the channel length and the grid electrode length is achieved.

The embodiment of the present application provides a trench MOSFET device, a manufacturing method and a chip, the device comprises a first cross section area, a second cross section area and a third cross section area which are arranged alternately along a first direction; the first cross section area, the second cross section area and the third cross section area all comprise: an N-type substrate, an epitaxial layer, a first trench, an oxide layer, a first N area, a P well area, an N+ area, a second trench, a gate and a source; the epitaxial layer is arranged on one side of the N-type substrate; the first N area is arranged below both sides of the first trench; the N+ area is arranged on both sides of the first trench; the P well area is connected below the N+ area; the second trench is arranged at the bottom of the first trench; the P area at the bottom and the corner of the second trench of the first cross section area and the P area at the bottom of the first trench of the third cross section area play an electric field shielding role, so that the device damage caused by the strong electric field at the corner of the trench is avoided, and the reliability of the device is improved.

This application provides a wafer cleaning method, belonging to the field of semiconductor technology. The wafer cleaning method includes: providing a wafer, the wafer including a first region and a second region; forming a plurality of piezoelectric structures on the first region of the wafer, the piezoelectric structures including sequentially stacked electric field shielding layers and piezoelectric layers; performing a semiconductor manufacturing process to form a semiconductor structure on the second region, after forming the semiconductor structure, the surface of the wafer has carbon-containing organic matter; performing a two-fluid cleaning process on the surface of the wafer, the piezoelectric structures causing the generation of oxide groups during the two-fluid cleaning process, and using the oxide groups to remove the carbon-containing organic matter on the surface of the wafer. This application can efficiently and safely remove carbon-containing organic matter from wafers.

The invention relates to a transformer and a manufacturing method thereof, and belongs to the technical field of electrical equipment, and the transformer comprises a coil winding which comprises a winding part and a wire outlet part, and the wire outlet part is connected with the winding part; the coil winding is mounted on the coil framework; the first electric field shielding layer is configured to shield the whole of the coil framework and the coil winding; the main insulating layer coats the outer side of the first electric field shielding layer, and the wire outlet part extends out of the main insulating layer; the second electric field shielding layer wraps at least part of the periphery of the main insulating layer; the coil framework comprises a supporting part and an extension part, the winding part is installed on the supporting part, one end of the extension part is connected with the supporting part, and the other end of the extension part extends out of the main insulating layer along the wire outlet part. The main insulating layer between the first electric field shielding layer and the second electric field shielding layer is uniformly distributed and is not layered, so that the risk of breakdown caused by over-high local field intensity of the main insulating layer is effectively reduced, and the insulation reliability of the transformer is improved.

The application belongs to the technical field of semiconductor devices, and provides a high-surge multi-stage trench Schottky diode and a preparation method thereof. The Schottky diode comprises an anode, an epitaxial wafer and a cathode arranged in sequence. The epitaxial wafer comprises a semiconductor substrate and an epitaxial layer. The epitaxial layer is provided with a plurality of deep trenches on a side in contact with the anode; each deep trench comprises n sub-trenches, the width of each sub-trench gradually decreases in a direction pointing to the bottom along the opening of the deep trench, and n is a positive integer greater than 1. The inner wall and the bottom of each deep trench are provided with a hetero-barrier layer, and a field plate dielectric is further provided in contact with the hetero-barrier layer; and the opening of the deep trench is surrounded by the hetero-barrier layer. The deep trench is filled with a filling structure. The high-surge multi-stage trench Schottky diode has a better electric field shielding effect in a reverse blocking state, can further reduce the electric field of the metal-semiconductor interface, and improve the breakdown voltage of the device, the surge capacity and the long-term working reliability.

The invention provides a current sensor without a magnetic core. The current sensor comprises an inverted cylindrical magnetic shielding body, an electric field shielding body, a diversion body, a magnetic field gradient sensing module and a signal processing module. By optimizing the structural design of the current conductor, the magnetic field gradient in the sensing direction of the magnetic field gradient sensing module by the current flowing through the current conductor is constructed or increased. And meanwhile, the magnetic shielding body and the electric field shielding structure which are arranged in a nested manner are utilized to form a three-dimensional anti-electromagnetic interference capability, so that the measurement precision, the working stability and the reliability of the current sensor are further improved. The current sensor provided by the invention has the advantages of small size, simple process, wide measuring range, high measurement precision, high frequency response and the like by laminating, nesting and assembling related parts under the condition of no magnetic core, and can well adapt to the special requirements of a future current precision measurement scene on the miniaturization and high frequency response of the current sensor.

The application belongs to the technical field of semiconductor device preparation, and relates to a metal mesh source electrode for a transistor, a transistor, a preparation method of the transistor and application of the transistor. In view of the problems of serious gate electric field shielding of a source electrode, discontinuous conductive path, difficult control of geometric morphology, and insufficient current injection uniformity and stability in the prior art, the application provides a metal mesh source electrode for a transistor, which comprises a metal conductive layer with mutually interconnected metal stripes and forming a grid gap, the stripe width of the metal stripes is 0.2-20 microns, and the duty cycle is 10-50%. The application further provides a preparation method of the metal mesh source electrode, which forms a crack template on the surface of a substrate and deposits metal, and removes the crack template to obtain a metal mesh conductive layer with controllable structure. Meanwhile, the application further provides application of the metal mesh source electrode in a vertical field effect transistor.

The invention relates to the technical field of semiconductors, and discloses a semiconductor structure and a preparation method thereof. The semiconductor structure comprises a semiconductor substrate layer; an epitaxial layer located on the semiconductor substrate layer; the electric field shielding region and the doped region are located in the epitaxial layer, the doped region is located on the side, away from the semiconductor substrate layer, of the electric field shielding region, and the doped region is exposed out of the surface of the side, away from the semiconductor substrate layer, of the epitaxial layer; the metal layer is located on the surface, deviating from the semiconductor substrate layer, of the epitaxial layer, and at least part of an opposite region between the metal layer and the electric field shielding region does not coincide with the doped region; and the electric field shielding region and the doped region have the same conduction type and are opposite to the conduction type of the epitaxial layer. The reverse voltage withstanding characteristic of the semiconductor structure is improved, and the reverse electric leakage characteristic is reduced.

The embodiments of the present application relate to a trench gate transistor, comprising: a semiconductor material layer; a gate trench comprising a side wall and a bottom wall, wherein the side wall comprises at least two first portions spaced apart in an extending direction and second portions located between adjacent first portions; first electric-field shielding structures located outside the gate trench and adjacent to the first portions; a body region located outside the gate trench and adjacent to the second portions, wherein the portion of the body region near the gate trench is used for forming channel regions; a drift region located below the channel regions; and second electric-field shielding structures located below the first electric-field shielding structures and having at least a portion extending below the channel regions, such that in the extending direction, the width of the drift region located between adjacent second electric-field shielding structures is smaller than the width of the channel regions. In this way, the saturation current of a device is significantly reduced, and the short-circuit performance of the device is optimized, thereby achieving a good balance among specific on-resistance (Rsp), a protection effect, and short-circuit performance.

The invention relates to a load switch for a switch cabinet and the switch cabinet. The load switch includes: a bracket; the three-position switch comprises a first static contact and a grounding static contact which are fixedly arranged on the bracket; the first moving contact is rotatably arranged on the support, and the first moving contact is provided with a closing position jointed with the first static contact, a grounding position jointed with the grounding static contact, and an isolation position between the first static contact and the grounding static contact; the vacuum arc-extinguishing chamber is connected with the three-position switch in parallel and comprises a shell, a second static contact and a second moving contact which are arranged in the shell, and the second moving contact is connected with a moving conductive rod extending out of the shell; and the first shielding piece is arranged near the shell in a manner of equipotential with the movable conducting rod, and the first shielding piece is provided with an opening for the second movable contact to pass through so as to provide electric field shielding during the switching-on and switching-off period.

The application belongs to the technical field of semiconductor manufacturing, and provides a semiconductor device and a preparation method thereof. The semiconductor device comprises a substrate, an epitaxial layer, a shielding gate, a gate, a body region, an injection region and a deep buried layer. The epitaxial layer is located on the front surface of the substrate. A plurality of grooves are arranged in the epitaxial layer. The shielding gate and the gate are arranged at intervals and located in the grooves. The body region is located on the side of the epitaxial layer away from the substrate. The injection region is located on the side of the body region away from the epitaxial layer. The deep buried layer is located in the epitaxial layer and on the opposite sides of the grooves along a first direction. By introducing the deep buried layer, a depleted electric field shielding layer can be formed on both sides below the grooves, thereby avoiding the concentration of the electric field in the weak areas such as the bottom of the grooves, reducing the high peak electric field around the shielding gate, making the electric field distribution in the device more uniform, and improving the breakdown voltage of the device.

An integrated multipole connector (1) comprising: a socket housing (11) in which a first conductor unit (12) with a shielding contact (123) for electric field shielding and a second conductor unit (13) with a shielding cover (133) for electric field shielding are mounted, wherein the second conductor unit (13) has a different current capacity than the first conductor unit (12), a plug housing (21) connected to the socket housing (11), in which a first plug connection (23) electrically connected to the first line unit (12) and a second plug connection (24) electrically connected to the second line unit (13) are mounted in the plug housing (21), a connector shielding sleeve (22) arranged in the connector housing (21) to shield the electric fields of the first and second connector terminals (23, 24), and a socket shielding sleeve (14) arranged in the socket housing (11) to shield an electric field between the socket housing (11) and the plug housing (21) by connecting with the plug shielding sleeve (22) when the socket housing (11) is connected to the plug housing (21).

The invention provides an electromagnetic compatibility high-frequency prediction method based on an improved LSTM, and relates to the technical field of high-frequency prediction methods, and the method comprises the following steps: building a metal shielding box example model; a metal shielding box equivalent circuit is constructed based on a Robinson algorithm, and the shielding effectiveness is solved; and obtaining data of the shielding effectiveness of a plurality of electric fields, and predicting the shielding effectiveness of the metal box body by using a CNN-BiLSTM-AdaBoost method. Compared with traditional LSTM, the model is higher in accuracy when being applied to shielding effectiveness prediction of the metal cavity.

The invention relates to the technical field of high-voltage direct-current transmission equipment monitoring, and discloses a high-voltage direct-current converter valve cooling system pressure sensor lifting device and method.The method includes the steps that a gradient stress ring and an electric field shielding cover are arranged, and the fringe effect is restrained from the physical level; after field installation, pre-pressurizing processing is carried out to optimize a pressure conduction path, and a two-step data compensation algorithm is adopted: an original digital signal is corrected by using a nonlinear edge effect compensation model established based on a maximum deviation feature point; a precise pressure value is calculated through a linear basic relation model, a compensation coefficient self-adaptive updating mechanism is further included, through periodic field calibration, coefficients of an edge effect compensation model are only pertinently updated when the measurement deviation exceeds the limit, and therefore precise compensation is conducted on long-term drift on the premise that the basic characteristics of the sensor are not changed. According to the invention, physical suppression is combined with an adaptive algorithm, so that the full-period service measurement repeatability and environmental adaptability of the sensor are improved.

The present application provides an electroplating apparatus for a substrate, the substrate comprising an electroplating region, the electroplating region comprising a central region and an edge region surrounding the central region, comprising: a substrate holder for holding and rotating the substrate; the edge plate is connected to the lower part of the substrate bracket; wherein the edge plate comprises an annular shielding part, a circle of edge of the electroplating area falls into a projection range of the shielding part on the substrate, and the projection range of the shielding part on the substrate is gradually reduced from outside to inside, so that the electric field shielding intensity of the shielding part on the edge area is gradually reduced from outside to inside; and the current density acting on the edge area and the current density acting on the central area are uniform, so that the coating thicknesses of the edge area and the central area are uniform.

The application relates to a semiconductor device. The semiconductor device comprises: a semiconductor material layer; a gate trench and a gate structure, the gate trench extending from a top surface of the semiconductor material layer into the semiconductor material layer; the gate structure being located in the gate trench; a source region, the source region being located between adjacent gate trenches; the source region comprising a well region and a source contact region located above the well region; a punch-through prevention structure, the punch-through prevention structure being located in the well region, and a doping concentration of the punch-through prevention structure being greater than a doping concentration of the well region; a first electric field shielding structure, the first electric field shielding structure being located between adjacent gate trenches; wherein a depth of the first electric field shielding structure is greater than a depth of the gate trench. By arranging the punch-through prevention structure and the first electric field shielding structure with a greater doping concentration, the device can significantly improve the ability to withstand blocking voltage in the case of a short channel, improve the gate oxide reliability, and thus improve the stability and reliability of the device in long-term operation.

The utility model relates to the high-voltage switch field, and discloses a high-voltage switch anti-interference shielding structure comprising two housings, high-voltage switch bodies are fixedly embedded in the two housings, top openings and bottom openings of the housings are in sealed plugging connection with sealing covers, opposite sides of the two housings are fixedly connected with two connecting plates, and the two connecting plates are fixedly connected with the high-voltage switch bodies. Wiring pipes are fixedly connected to the bottom and the bottom of the high-voltage switch body, sliding rods are slidably connected to the two sides of each wiring pipe in a penetrating mode, and wire clamping blocks are fixedly connected to the opposite ends of the two sliding rods. The high-voltage switch is simple to use, the high-voltage switch body is installed in the shell to effectively isolate interference, the shell is made of aluminum alloy, conductivity and mechanical strength are both considered, a copper net can be lined in a high-voltage area to enhance electric field shielding, and a circuit board is directly installed in a metal shielding box, so that the high-voltage switch is convenient to use. In this way, module-level shielding can be carried out, and independent operation can be conveniently carried out.

This invention belongs to the field of cable technology, specifically a copper alloy high-current flexible medium-voltage power cable. It comprises an inner conductor, a conductor shielding layer, an electrical insulation layer, an electric field shielding layer, a metallic shielding layer, a bistable layer, and an outer sheath. The bistable layer consists of inner and outer bistable layers with elongated oval cross-sections, forming a straight region and an arc-shaped region between them. The arc-shaped region has a mesh structure, while the straight region has corresponding first and second support structures. In the straight state, the support structures are in contact, resulting in high bending stiffness and a rigid cable. Under bending conditions, the support structures separate, the mesh structure deforms, the bending stiffness drops sharply, and the cable becomes flexible. This invention achieves controllable switching between rigid and flexible states through the bistable layer, adapting to complex working conditions requiring self-supporting crossing and flexible bending, such as mobile power supply, ship tunnels, and robot cables.

The application belongs to the technical field of ring main units, and particularly relates to a load switch and a ring main unit. The load switch comprises a fixed support assembly, a switching-on assembly and an electric field shielding assembly. The fixed support assembly comprises a fixed plate, a static end electrically conductive part and a dynamic end electrically conductive part. The static end electrically conductive part and the dynamic end electrically conductive part are arranged on the fixed plate along a first direction. The surface of the fixed plate is provided with protruding ribs. The switching-on assembly comprises a dynamic contact bridge part and a driving part. The dynamic contact bridge part moves along the first direction under the driving of the driving part to have a first position in contact with the static end electrically conductive part to switch on a circuit and a second position separated from the static end electrically conductive part to switch off the circuit. The electric field shielding assembly comprises a static end shielding cover covering the connection part of the static end electrically conductive part and the fixed plate and a dynamic end shielding cover covering the connection part of the dynamic end electrically conductive part and the fixed plate. The application realizes high insulation reliability of the load switch in a compact volume and is suitable for reducing the use of SF6 gas by using environment-friendly gas.

This application belongs to the field of power device technology and provides a trench-type MPS device and its fabrication method. A trench is formed on the front side of an N-type epitaxial layer. Then, a first P-type dopant ion is implanted at the bottom of the trench, followed by high-temperature annealing to form a first P-type doped region. A second P-type dopant ion is implanted below the sidewall of the trench, and a third P-type dopant ion is implanted above the sidewall of the trench. Then, low-temperature annealing is performed to form a second P-type doped region below the sidewall of the trench and a third P-type doped region above the sidewall of the trench. The doping concentration of the first, second, and third P-type doped regions gradually increases, resulting in weaker electric field shielding of the Schottky device at the bottom of the trench and higher anode implantation efficiency above the sidewall of the trench. This satisfies the conditions of high electric field shielding for the Schottky device and minimal impact on IRM, achieving the characteristics of high breakdown voltage, low VF, high softness, and low IRM for the fast recovery diode device.

The invention provides a planar gate MOSFET structure and a preparation method thereof, and the method comprises the steps: carrying out the ion implantation at a preset depth on the upper surface of an epitaxial layer between well regions to form a buffer layer, and enabling the buffer layer to comprise a plurality of buffer layer units which are arranged at intervals in the length direction of the well regions; each buffer layer unit is at least in contact connection with the well region on one side of the buffer layer, so that a JFET structure controlled by drain voltage is formed when the device works, and adaptive adjustment of the Miller capacitance is realized; in addition, the buffer layer further shares the electric field shielding effect of the gate oxide layer and relieves the electric field concentration effect of the gate oxide layer, so that the planar gate MOSFET structure prepared by the method can collaboratively optimize the contradictory relation between switching loss and switching oscillation on the premise of not remarkably increasing the on resistance, and meanwhile, the gate-oxide long-term reliability of the device is improved.

The invention provides a self-adaptive reconfigurable high dynamic range infrared detector and a control method thereof. The detector comprises a first electrode, an N-type InP layer and an intrinsic InGaAs layer, an annular P-type InP region is arranged on the outer side of the side wall of the intrinsic InGaAs layer, an oxide layer is arranged on the surface of the other side of the intrinsic InGaAs layer, and a transparent electrode is arranged on the oxide layer; and a second electrode is arranged on the P-type InP region. By applying voltage to the transparent electrode, the energy band structure and the carrier transport characteristic of the InGaAs surface can be regulated and controlled: zero bias or positive bias voltage is applied under weak light, and high sensitivity is maintained; negative bias voltage is applied under strong light, a high-concentration hole high-conductivity channel is formed on the surface of the InGaAs in an induction mode, hole collection is accelerated, and charge accumulation and an electric field shielding effect are eliminated. Therefore, linear response in a wide dynamic range is realized under the condition that external attenuation devices are not added.

The invention relates to the technical field of surface treatment equipment, and particularly discloses a device for improving electroplating uniformity of an inner cavity of a complex cavity part, which comprises an auxiliary anode tool and a conductive hanger. The auxiliary anode tool is provided with an auxiliary anode extending into the inner cavity of the part and a conductive connecting part connected with a power supply, and is used for directly supplementing current to the inner cavity. The conductive hanging tool is provided with a part hanging position enabling an opening of an inner cavity of the part to incline upwards, and gas exhaust is facilitated. And the two are detachably connected and combined for use. By actively regulating and controlling the electric field of the inner cavity and optimizing the mounting and hanging posture, the technical problems of low current density of the inner cavity and thin and non-uniform plating caused by electric field shielding and air clog are cooperatively solved, and the overall electroplating quality and consistency of the complex cavity part are remarkably improved.

The present application provides a semiconductor structure and a method for forming same. The semiconductor structure comprises: a semiconductor substrate, wherein an epitaxial layer is formed on a first surface of the semiconductor substrate, and a plurality of junction implants are formed in the epitaxial layer; a JFET region, located between the plurality of junction implants, wherein the distance between two adjacent junction implants among the plurality of junction implants is defined as a JFET gap; and a plurality of buried implant regions, located in part of the JFET region, wherein the top surfaces of the buried implant regions are lower than the top surface of the JFET region, and the doping type of the buried implant regions is opposite to the doping type of the JFET region. The present application provides a semiconductor structure and a method for forming same. The buried implant regions are formed in the JFET region as an electric field shielding layer, to achieve balance between an electric field and a current without reducing the channel density; in addition, the process is simple, and further scaling down of the size of the JFET region will not be affected.

The invention provides a holosymmetric miniature three-dimensional electric field sensitive structure, a sensor and a three-dimensional electric field detection method. The sensor comprises a sensitive structure, a supporting unit, a piezoelectric driving beam (1) and a middle connecting unit (2), the holosymmetric miniature three-dimensional electric field sensitive structure comprises an electric field shielding electrode (3) and a fixed induction electrode (4); a substrate (5) of the supporting unit is used for supporting the piezoelectric driving beam and fixing the induction electrode; the middle connecting unit (2) is physically connected with the piezoelectric driving beam (1), and the middle connecting unit (2) generates displacement or out-of-plane deflection in the vertical direction under the action of deformation of the piezoelectric driving beam (1); the electric field shielding electrodes (3) are physically connected with the middle connecting unit (2), and the multiple sets of electric field shielding electrodes (3) displace in the vertical direction under the action of vertical displacement or out-of-plane deflection movement of the middle connecting unit. According to the invention, full-vector high-fidelity detection which is small in size, low in power consumption and almost distortionless for a detected electric field is realized.

Provided in the present application is an electroplating device for a substrate. The substrate comprises an electroplating region, which comprises a central region and an edge region enclosing the central region. The electroplating device comprises: a substrate holder configured to hold and rotate the substrate; and an edge plate connected below the substrate holder. The edge plate comprises an annular shielding portion. The full edge of the electroplating region falls within the range of the projection of the shielding portion on the substrate. The range of the projection of the shielding portion on the substrate gradually decreases from outside to inside, such that the electric-field shielding strength of the shielding portion against the edge region gradually decreases from outside to inside. As a result, the current density acting on the edge region and the current density acting on the central region are uniform, thereby achieving a uniform plating thickness in the edge region and the central region.

The invention relates to a coil winding, a manufacturing method of the coil winding and electrical equipment, and belongs to the technical field of the electrical equipment. The first insulating layer coats the outer side of the coil body; the first electric field shielding layer coats the outer side of the first insulating layer; the first electric field shielding layer comprises a first shielding part which is located at a first space position relative to the coil body; the second shielding part is located at a second spatial position relative to the coil body; under the condition that the coil body is electrified, the electric field intensity of the first spatial position is greater than that of the second spatial position; the first shield is configured to have a first resistivity and the second shield is configured to have a second resistivity, the first resistivity being less than the second resistivity. According to the coil winding, the first resistivity of the first shielding part and the second resistivity of the second shielding part in the first electric field shielding layer are matched with the electric field intensity of the spatial position where the first electric field shielding layer is located, so that the electric field shielding effect is improved.