Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problem of insufficient depletion, devices that cannot provide high-level breakdown voltage, and limited optimization of gate polycrystalline boundary electric field and other issues to achieve the effect of increasing the breakdown voltage

Inactive Publication Date: 2019-07-05
CSMC TECH FAB2 CO LTD
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  • Abstract
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Problems solved by technology

[0003] The existing technology is to enhance the depletion of the drift region by forming a layer of metal field plate in the drift region, but only setting a first-level field plate to enhance the depletion of the drift region still makes the depletion of

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

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[0056] The present invention provides a method for preparing a semiconductor device, such as figure 1 As shown, the main steps of the preparation method include:

[0057] Step S101: providing a semiconductor substrate formed with a body region, a gate dielectric layer and a field oxide layer;

[0058] Step S102: forming a gate polycrystalline, the gate polycrystalline covering the gate dielectric layer and the field oxide layer, and exposing at least part of the field oxide layer;

[0059] Step S103: Use the drift region masking layer as a mask to form a drift region in the semiconductor substrate by ion implantation, and continue to use the drift region masking layer as a mask to remove the exposed field oxide layer to form a contact with the gate A first field oxide self-aligned with very polycrystalline silicon, the gate polycrystalline being used as a first field plate;

[0060] Step S104: forming a source region in the body region, and forming a drain region in the drift region; ...

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The method comprises the steps of: providing a semiconductor substrate formed with a body region, a gate dielectric layer and a field oxide layer; forming a gate polycrystal, wherein the gate polycrystal covers the gate dielectric layer and the field oxide layer and exposes at least part of the field oxide layer; forming a drift region in the semiconductor substrate by ion implantation with the drift region masking layer as a mask, and continuously removing the exposed field oxide layer with the drift region masking layer as a mask to form a first field oxide self-aligned with the gate polycrystal, wherein the gate polycrystal is used as a first field plate; forming a source region in the body region, and forming a drain region in the drift region; forming a second field oxide on the semiconductor substrate; and forming a second field plate on the second field oxide. According to the manufacturing methodof the semiconductor device, the two-stage field plates are formed, so that the depletion of the drift region is enhanced while the electric field of the grid electrode boundary is improved, and the breakdown voltage of the device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, lateral double diffused metal oxide semiconductor field effect transistor (Lateral Double Diffused MOSFET, LDMOS) devices are widely used due to their good short channel characteristics. As a power switching device, LDMOS has the characteristics of relatively high operating voltage, simple process, and easy process compatibility with low-voltage CMOS circuits. Compared with ordinary MOS devices, there is a lightly doped implanted region in the drain, which is called the drift region. Because it is usually used in power circuits, it needs to obtain a large output power, so it must be able to withstand a high breakdown voltage. [0003] The existing technology is to enhance the depletion of the drift region by forming a layer...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L21/336H01L29/40
CPCH01L29/7816H01L29/66681H01L29/404H01L29/7835H01L29/66659H01L29/1045H01L29/665H01L29/42368H01L29/4933
Inventor 金华俊孙贵鹏
Owner CSMC TECH FAB2 CO LTD
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