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Method for simultaneously preparing enhanced and depletion gate devices and device

An enhanced and depleted technology, used in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve the problems of poor electrical performance and high process cost, reduce metal evaporation, improve quality, avoid The effect of exposure and time

Inactive Publication Date: 2019-08-09
福建省福联集成电路有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For this reason, it is necessary to provide a method and device for simultaneous preparation of enhancement-type and depletion-type gate devices, so as to solve the problems of high process cost and poor electrical performance in the preparation of existing enhancement-type and depletion-type devices.

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  • Method for simultaneously preparing enhanced and depletion gate devices and device
  • Method for simultaneously preparing enhanced and depletion gate devices and device
  • Method for simultaneously preparing enhanced and depletion gate devices and device

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Embodiment Construction

[0038] In order to explain in detail the technical content, structural features, achieved goals and effects of the technical solution, the following will be described in detail in conjunction with specific embodiments and accompanying drawings. The English abbreviations that may appear in the instructions and drawings of the instructions are first explained as follows:

[0039] 1. EGB: E-modeGate Bottom, enhanced device bottom photolithography process.

[0040] 2.EGT: E-modeGate Top, enhanced device top photolithography process.

[0041] 3.EGD: E-modeGate Deposition, enhanced device metallization deposition process.

[0042] 4.DGP: D-ModeGatePhoto, depletion device lithography process.

[0043] 5. DGD: D-modeGateDeposition, depletion device metallization deposition process.

[0044] 6.1PN: 1st Passivation Nitride, the first passivation layer nitride deposition process.

[0045] 7.1MD: 1st Metal Deposition, the first metal layer deposition process.

[0046] 8.2PN: 2nd Pass...

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Abstract

The invention discloses a method for simultaneously preparing enhanced and depletion gate devices and a device. The method comprises the following steps: a source metal and a drain metal are preparedon an epitaxial wafer; a first photoresist is coated and an opening is arranged on the gate bottom of the enhanced device; fluoride ion injection and heat treatment are performed on the bottom of theenhanced device to repair the lattice; the first photoresist is removed, a second photoresist is coated and an opening of which the upper part is wide and the lower part is narrow is arranged on the enhanced gate bottom and the depletion gate bottom; a third photoresist is coated and an opening of which the upper part is narrow and the lower part is wide is arranged on the enhanced gate bottom andthe depletion gate bottom; metal deposition is performed so that the metal is deposited on the enhanced gate bottom and the depletion gate bottom to form the enhanced gate metal and the depletion gate metal; and the second photoresist and the third photoresist are removed. The metal evaporation process of the enhanced gate and the depletion gate is simultaneously performed so as to reduce the primary metal evaporation, save the cost and improve the performance.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor devices, in particular to a method and a device for simultaneously preparing enhancement-type and depletion-type gate devices. Background technique [0002] In the prior art, when preparing enhancement-type and depletion-type gate devices on gallium arsenide substrates, such as figure 1 As shown, the enhancement mode and depletion mode devices are generally prepared separately, and finally the passivation layer is deposited on the device. Among them, the preparation method of the enhanced device is: Y gate bottom lithography process - Y gate top lithography process - Y gate metallization deposition process - metal tempering process; the depletion device preparation method is: surface cleaning - Gate photolithography process - Y gate metallization deposition process. After both the enhancement-type and depletion-type device processes are completed, the passivation process and the subseq...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/088H01L21/8236
CPCH01L21/8236H01L27/0883
Inventor 陈智广吴淑芳林张鸿林伟铭
Owner 福建省福联集成电路有限公司
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