Double-tube-core device and manufacturing method thereof

Abstract

The invention discloses a double-tube-core device and a manufacturing method thereof. According to the invention, when the drain electrode is pressurized, a P-body region expands and a N-epitaxial layer forms a depletion layer, the depletion layer at the bottom of a source region and the depletion layer of a terminal region slowly change and are stopped at the terminal, so that the electric fieldat the edge of a chip is weakened, the breakdown voltage of the whole terminal structure is improved, and the reverse leakage current of the device is reduced. According to the invention, a connectinghole is manufactured in two steps, when the second mixed gas is etched, a protective film formed by the second mixed gas is thinner, and a second connecting hole is set to be circular or elliptical,after hole injection and diffusion are carried out, the formed contact area is crescent, the distribution area of the contact area is wider, the reduction of the base region resistance is facilitated,the conduction of a parasitic triode is prevented, the UIS capability is further improved, and the effect is obvious. Through the improvement, the breakdown voltage of the device can be improved by about 11 percent, and the on-resistance can be reduced by about 3.3 percent.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a dual-tube core device and a manufacturing method thereof. Background technique [0002] In some lithium battery charge and discharge protection circuits, two identical NMOSs are usually used together to realize battery protection functions under overcharge, overdischarge, overcurrent, short circuit, etc. [0003] The conventional practice is to package two NMOSs with their own terminal structures, and then package them together. The disadvantage of this is that the packaged chip has a larger area. [0004] Later, some dual-die devices appeared, such as the dual-die devices disclosed in application numbers 201510683826.7 and 201510683582.2, which only use one terminal for two dies to reduce the area of ​​the chip. The dual-die devices disclosed in application number 201510683582.2 The device also sets a metal layer on the upper side of the terminal to prevent external signals from...

AI Technical Summary

Problems solved by technology

For the reverse type, a surface conduction channel will be formed between the active area and the scribe groove, which will seriously affect the performance of the device and even cause the chip to fail.

From the actual chip manufacturing experience, the phenomenon that the inversion of the silicon surface leads to the formation of surface conductive channels is very common and common, and the existence of surface conductive channels cannot be ignored. Therefore, further improvement is needed.

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