Manufacturing method of semiconductor memory element and the element

Abstract

The invention discloses a manufacturing method of a semiconductor memory element and the element, and belongs to the technical field of semiconductors. The method comprises the following steps of: forming a bit line structure and a groove at the peripheral side of the bit line structure on a substrate; depositing a first isolation layer on the surfaces of the substrate and the bit line structure,with the first isolation layer comprising silicon nitride and silicon carbonitride; thinning the first isolation layer through a wet etching process; forming a second isolation layer on the surfaces of the substrate and the bit line structure; filling a third isolation layer in the trench; and forming a fourth isolation layer on the second isolation layer on the surface of the bit line structure.According to the method and the element, the silicon carbonitride is added into the material of the first isolation layer; and therefore, the problem that the surface of the first isolation layer is uneven due to different reaction rates of phosphoric acid and silicon nitride at different positions is solved, the flatness of the thinned first isolation layer is improved to a certain extent, and the flatness of the bit line structure is improved to a certain extent.

Description

Technical field

[0001] This application relates to the field of semiconductor technology, in particular to a method for manufacturing a semiconductor storage element and the element. Background technique

[0002] Dynamic random access memory (Dynamic Random Access Memory, DRAM) uses a transistor plus a capacitor to store one bit of data. Because the charge in the capacitor will be lost over time, it must be used To periodically replenish the power (refresh) to maintain the stored content, so it is called dynamic (Dynamic).

[0003] DRAM elements are provided with a bit line (BL) structure and a word line (WL) structure. The bit line structure is usually connected to the drain of the DRAM element. During the manufacturing process of the DRAM element, there is a certain probability that the bit line structure will appear Uneven growth results in lower wafer yield of DRAM devices. Summary of the invention

[0004] The embodiments of the present application provide a method for manufa...

Examples

Embodiment Construction

[0057] The technical solutions in the present application will be described clearly and completely in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of them. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of this application.

[0058] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the pointed device or element must have a specific orientation or a specific orientation. Th...

Technical field

[0001] This application relates to the field of semiconductor technology, in particular to a method for manufacturing a semiconductor storage element and the element. Background technique

[0002] Dynamic random access memory (Dynamic Random Access Memory, DRAM) uses a transistor plus a capacitor to store one bit of data. Because the charge in the capacitor will be lost over time, it must be used To periodically replenish the power (refresh) to maintain the stored content, so it is called dynamic (Dynamic).

[0003] DRAM elements are provided with a bit line (BL) structure and a word line (WL) structure. The bit line structure is usually connected to the drain of the DRAM element. During the manufacturing process of the DRAM element, there is a certain probability that the bit line structure will appear Uneven growth results in lower wafer yield of DRAM devices. Summary of the invention

[0004] The embodiments of the present application provide a method for manufa...

Examples

Embodiment Construction

[0057] The technical solutions in the present application will be described clearly and completely in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of them. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of this application.

[0058] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the application and simplifying the description, and does not indicate or imply that the pointed device or element must have a specific orientation or a specific orientation. Th...

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