Preparation method of folding space charge region Schottky diode
A technology of Schottky diode and space charge region, which is applied in the manufacturing of circuits, electrical components, semiconductor/solid-state devices, etc. Effect
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0053] See figure 1 , figure 1 It is a flowchart of a method for preparing a folded space charge region Schottky diode provided by an embodiment of the present invention. Such as figure 1 As shown, the preparation method of the folded space charge region Schottky diode of the present embodiment comprises steps:
[0054] S101, selecting a Si substrate.
[0055] S102, forming an insulating layer on the surface of the Si substrate; the material of the insulating layer is preferably SiO 2 Insulation Materials.
[0056]S103, forming a first epitaxial layer on the surface of the insulating layer.
[0057] S104, performing ion doping on the first epitaxial layer.
[0058] S105, forming a second epitaxial layer on a surface of the first epitaxial layer; forming a two-dimensional electron gas between the first epitaxial layer and the second epitaxial layer.
[0059] S106, forming a third epitaxial layer on the upper surface of the second epitaxial layer.
[0060] S107, etching ...
Embodiment 2
[0064] See Figure 2a~2s , Figure 2a~2s It is a schematic diagram of a manufacturing method of a folded space charge region Schottky diode provided by an embodiment of the present invention. In this embodiment, on the basis of Embodiment 1, each step and detailed parameters of the preparation method are described in detail. The preparation method of the folded space charge region Schottky diode of the present embodiment comprises the steps of:
[0065] S201, such as Figure 2a As shown, choose Si substrate 001.
[0066] S202, such as Figure 2b As shown, a layer of SiO was formed by oxidation on Si substrate 001 2 , as the insulating layer 002.
[0067] S203, such as Figure 2c As shown, a first epitaxial layer 003 with a thickness of 0.20-0.30 μm is deposited on the insulating layer 002 by using a PECVD process at a temperature of 250-450° C.
[0068] S204, such as Figure 2d As shown, a layer of first photoresist 004 is added on the upper surface of the first epita...
Embodiment 3
[0099] When adopting the technical scheme of carving grooves on the epitaxial layer of the folded Schottky diode to improve the energy conversion efficiency, the existence of the first groove will cause the problem that the electrons of the Schottky diode will drop slightly. In order to increase the conduction current, the present invention further designs the technical solution of Embodiment 3.
[0100] The difference between this embodiment and the second embodiment is that the first metal electrode is not deposited directly on the horizontal plane where the upper surface of the epitaxial layer is located, but by first etching the second groove 016 on the upper surface of the epitaxial layer in the anode region, and then Metal is then deposited in the second groove 016 to form the first metal electrode, ie the anode. For details, please refer to Figure 3a-3d . It should be noted that this embodiment only provides steps and drawings that are different from those in Embodim...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More