Burr-free TSPC type D trigger with scanning structure and processor

Abstract

The invention discloses a burr-free TSPC type D trigger with a scanning structure and a processor. The burr-free TSPC type D trigger with the scanning structure comprises an enable circuit, a first-stage inverting logic, a second-stage inverting logic, a third-stage inverting logic and a fourth-stage inverting logic, wherein the enable circuit, the first-stage inverting logic, the second-stage inverting logic, the third-stage inverting logic and the fourth-stage inverting logic are connected in sequence. According to the invention, the generation of burrs is inhibited through the first and second inverting logics; the defect that burrs are introduced into a classic TSPC type D trigger in the clock signal period overturning process due to the second-stage inverting logic is overcome; the setup time (setup) and the hold time (hold) of the trigger are basically kept unchanged; and the fourth-stage inverter is added to enhance the driving capability of the output signal, the internal datadelay is smaller than that of a common D trigger, and the D trigger is more suitable for the design of a high-performance integrated circuit and can be applied to a high-performance CPU, a high-end chip, super computing and the like.

Description

technical field [0001] The invention relates to a high-speed master-slave D flip-flop in the field of high-performance integrated circuit design, in particular to a burr-free TSPC (True Single Phase Clock, True Single Phase Clock) type D flip-flop and a processor with a scanning structure. Background technique [0002] Since the advent of CMOS integrated circuit technology, flip-flops have always been one of the core components of digital integrated circuits. They are the basic units for implementing sequential logic such as pipelines, state machines, counters, and register files. Their speed directly affects the performance of circuits and chips. There are many types of D flip-flops, which are divided into RS flip-flops, JK flip-flops, D flip-flops, T flip-flops and other functional types; according to different circuit structures, they are divided into master-slave structure, sensitive amplifier structure and maintaining blocking structure etc. Among them, the D flip-flop...

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a burr-free TSPC-type D flip-flop and processor with a scanning structure for the existing problems of burrs and power consumption in the traditional TSPC-type D flip-flop, and the existing improvement is not perfect. The invention can overcome the burr problem and its power consumption loss, realize low overhead, maintain high working speed and small floor area, and improve its universal adaptability, and is suitable for the design of high-performance microprocessors

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