A Structure of Voltage Clamp Protection Based on Switching Mode

Abstract

A voltage clamping protection structure based on switch mode. An ATE test board leads multiple test channels to connect with the external chip under test, which includes parallel diode groups and switch mode power stage units. The switch mode power stage The unit is used for voltage conversion between the clamping voltage power supply terminal Vo, the second power supply terminal Vm and the first power supply terminal Vi, and realizes current transfer and energy conversion, wherein the clamping voltage power supply terminal Vo and the voltage clamping protection unit clamp The high-end voltage VH or the low-end voltage VL are connected; in normal operation, when the clamp voltage power supply terminal Vo is the clamp high-end voltage VH, the current flows into the first power supply terminal Vi or the second power supply through the clamp voltage power supply terminal Vo terminal Vm, when the clamping voltage power supply terminal Vo is the clamping low-end voltage VL, the current flows out from the first power supply terminal Vi or the second power supply terminal Vm to the clamping voltage power supply terminal Vo.

Description

technical field [0001] The invention relates to the field of semiconductor automatic testing equipment, in particular to a switch mode-based voltage clamping protection structure. Background technique [0002] In the semiconductor automatic test equipment ATE, a single test board usually leads out many test channels (ch) to connect with an external chip under test (Device Under Test, DUT for short). These channels generally come directly from the pin output of the test chip on the single board of the ATE system. Since the external chip under test is a live test, its good or bad status is unknown. An abnormal voltage is applied to the test channel, and the abnormal voltage exceeds the maximum rated withstand voltage range of the test channel on the board. At this time, if the protection clamp is not used, it is very likely that the pins of the test chip on the board will be broken down, and then damaged. testing equipment. [0003] However, due to the requirements of test a...

AI Technical Summary

Problems solved by technology

Taking an LDO with a 2V differential voltage as an example, the power consumption on the LDO is about 2W, which is also very large. Generally, a large-volume LDO and a high-condition heat dissipation method are required to ensure the normal operation of the LDO, and the design cost is relatively high.

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