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Shallow trench isolation structure and preparation method thereof

A technology of isolation structures and shallow trenches, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as side trenches, reduce parasitic currents, avoid formation of side trenches, and improve production yield Effect

Pending Publication Date: 2020-03-24
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a shallow trench isolation structure and a preparation method thereof, which are used to solve the problem of side ditch etc. question

Method used

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  • Shallow trench isolation structure and preparation method thereof
  • Shallow trench isolation structure and preparation method thereof
  • Shallow trench isolation structure and preparation method thereof

Examples

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Embodiment 1

[0069] Such as Figure 2 to Figure 17 As shown, the present invention provides a method for preparing a shallow trench isolation structure, the method comprising the following steps:

[0070] 1) providing a substrate, and sequentially forming a stacked pad oxide layer and an etching stopper layer on the substrate;

[0071] 2) forming a first opening in the etch stop layer and the pad oxide layer, and forming a first trench in the substrate according to the first opening;

[0072] 3) forming a sidewall protection layer in the first opening and the first trench, the upper surface of the sidewall protection layer being flush with the upper surface of the etching stopper layer;

[0073] 4) forming a hard mask layer on the surface of the etching stopper layer and the sidewall protection layer, and forming a second opening in the hard mask layer;

[0074] 5) forming a second groove in the sidewall protection layer according to the second opening, the lateral dimension of the secon...

Embodiment 2

[0099] Such as Figure 17 As shown, the present invention also provides a shallow trench isolation structure, which is obtained by the preparation method described in the first embodiment. Specifically, the shallow trench isolation structure of this embodiment includes:

[0100] Substrate 21;

[0101] The first groove 24 is located in the substrate 21;

[0102] a sidewall protection layer 25, located on the sidewall of the first trench 24, and extending from the bottom of the first trench 24 to above the substrate 21;

[0103] The second groove 27 is partly located in the substrate 21 and inside the sidewall protection layer 25 , the upper surface of the second groove 27 is flat with the upper surface of the sidewall protection layer 25 together;

[0104] The third trench 28 is located in the substrate 21 and at the bottom of the second trench 27, and communicates with the second trench 27;

[0105] a substrate oxide layer 29 located on the sidewall and bottom of the thir...

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Abstract

The invention provides a shallow trench isolation structure and a preparation method thereof, and the preparation method comprises the steps: 1), providing a substrate, and sequentially forming a padoxide layer and an etching barrier layer which are stacked on the substrate; 2) forming a first trench in the etching barrier layer, the pad oxide layer and the substrate; 3) forming a side wall protection layer in the first groove; 4) forming a hard mask layer; 5) forming a second trench in the hard mask layer and the side wall protection layer; 6) forming a third groove, wherein the third grooveis communicated with the second groove; 7) forming a substrate oxide layer on the side wall and the bottom of the third trench; 8) forming isolation dielectric layers in the second trench and the third trench; and 9) removing etching barrier layer and the pad oxide layer. According to the shallow trench isolation structure and the manufacturing method thereof, the side trench phenomenon generatedin the manufacturing process of the shallow trench isolation structure can be avoided, parasitic current is effectively reduced, the electrical performance of a device is guaranteed, the production yield is improved, the shallow trench isolation structure can achieve a good isolation effect, and the performance of the device is improved.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a shallow trench isolation structure and a preparation method thereof. Background technique [0002] A shallow trench isolation structure (shallow trench isolation, usually abbreviated as STI) is widely used in logic and memory chips to implement isolation between adjacent devices, especially between adjacent active regions. The manufacturing process of the existing shallow trench isolation structure includes: using the pad oxide layer and the etch stop layer as an etching mask to form a shallow trench, filling the shallow trench with an isolation medium (usually silicon dioxide), and then performing CMP After the planarization process, the etch stop layer and the pad oxide layer are respectively removed by using hot phosphoric acid and diluted hydrofluoric acid. However, in the process of wet removal, chemical reagents may attack the filled isolation medium, caus...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76224
Inventor 宛伟
Owner CHANGXIN MEMORY TECH INC
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