Semiconductor chip testing device

Abstract

The invention provides a semiconductor chip testing device which comprises a box body, a chip positioning block, a low-voltage copper column and fluid inlets / outlets. The box body comprises an upper base plate and a lower base plate which are made of a conductive material and a plurality of side plates which are made of an insulating material, wherein the upper bottom plate is used for connectinga low-voltage power supply, and the lower bottom plate is used for connecting a high-voltage power supply. The chip positioning block is made of a conductive material and is in contact with the lowerbottom plate, and a chip groove for accommodating a to-be-tested chip is formed in the chip positioning block. The low-voltage copper column penetrates through the upper bottom plate and applies pressure to the to-be-tested chip in the chip positioning block through up-and-down movement relative to the upper bottom plate, wherein the size of the lower bottom surface of the low-voltage copper column is matched with the size of a low-voltage electrode of the to-be-tested chip. The fluid inlets / outlets are positioned in two opposite side plates and are used for allowing a heated insulating fluidmedium to flow into or out of the box body.

Description

technical field [0001] The invention relates to the technical field of semiconductor testing, in particular to a testing device for semiconductor chips. Background technique [0002] At present, the testing device of the whole wafer or the bare chip of the power semiconductor chip is usually a probe card, the bottom of which uses a vacuum adsorption system to position the chip, and the top uses multiple probes to contact the electrodes of the chip to complete the electrical test. The structure of the test device is soldering to simulate the wire bonding and chip welding in the package structure of the analog module, and there are the following defects in the testing process: 1) it is impossible to simulate the pressure state of the chip; 2) the heating adopts a heating plate or nitrogen purging, the Unstable, easy to oxidize the chip and cause failure; 3) When the dynamic test of the chip fails, the huge energy release will easily ablate and damage the probe, resulting in th...

AI Technical Summary

Problems solved by technology

The structure of the test device is soldering to simulate the wire bonding and chip welding in the package structure of the analog module, and there are the following defects in the testing process: 1) it is impossible to simulate the pressure state of the chip; 2) the heating adopts a heating plate or nitrogen purging, the Unstable, easy to oxidize the chip and cause failure; 3) When the dynamic test of the chip fails, the huge energy release will easily ablate and damage the probe, resulting in the failure of the probe card, high test cost, and no batch test capability

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