Digital signal processor layout distribution positioning method

Abstract

In order to overcome the limitation of an existing reverse analysis method on the applicability of a large-scale integrated circuit, the invention provides a digital signal processor layout distribution positioning method, which comprises the following steps of: 1, acquiring an active region dyeing photograph of a DSP (Digital Signal Processor) chip; 2, if the DSP chip adopts an inverted packagingstructure, thinning and polishing the substrate of the DSP chip; 3, dividing the DSP chip into different modules; 4, positioning a quadrant where each module is located; 5, marking each position coordinate and time information for generating the single event effect; 6, marking all single event effect data points on the original layout photo of the DSP chip according to position coordinates; and 7, confirming the layout positioning of each module according to the acquired single event effect position coordinates, and drawing the position of each module by using a drawing tool in combination with the active region dyeing micrograph.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, and in particular relates to a digital signal processor layout distribution positioning method. Background technique [0002] As a typical VLSI, a digital signal processor (DSP) has the advantages of fast calculation speed, low power consumption, and small size compared with ordinary microprocessors, because of its powerful digital signal Processing plays an important role in digital communication, signal processing, industrial control, image processing and other fields. At the same time, due to the above-mentioned advantages of DSP, it also occupies a very important position in the field of aerospace electronics. [0003] The layout design of integrated circuits is a combination of science and artistry, and it requires long-term practice and accumulation to design excellent products. A good layout design can not only save the volume and weight of the chip, but also optimize the resourc...

AI Technical Summary

Problems solved by technology

[0005] Both of the above two reverse analysis methods analyze the layout of commercial electronic chips, but this reverse analysis method is only applicable to storage devices with single chip functions and simple structures. electronic chip

In addition, reverse analysis methods are time and costly

Therefore, reverse analysis is not applicable to large-scale integrated circuits with many functional modules and complex structures.

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