Shielded gate field effect transistor and method of forming the same

Abstract

The invention provides a shield gate field effect transistor and a forming method thereof. According to the forming method, a protection layer is formed on the side wall of a groove, so that the protection layer is used for preventing the side wall of the groove from being damaged by a high-density plasma process, plasma is prevented from being injected into the side wall of the groove, and the device performance of the prepared shield gate field effect transistor is guaranteed.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a shielded gate field effect transistor and a forming method thereof. Background technique [0002] A shielded gate field effect transistor (Shielded Gate Trench, SGT) is more conducive to the flexible application of semiconductor integrated circuits because of its low gate-to-drain capacitance Cgd, very low on-resistance, and high withstand voltage performance. Specifically, in the shielded gate field effect transistor, by setting the shielding electrode below the gate electrode, the gate-to-drain capacitance can be greatly reduced, and the drift region of the shielded gate field effect transistor also has a relatively high impurity carrier Concentration, can provide additional benefits to the breakdown voltage of the device, which can reduce the on-resistance accordingly. [0003] Compared with other trench field effect transistors, shielded gate field effect transistor...

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a method for forming a shielded gate field-effect transistor, so as to solve the problem that plasma is easily injected into the side wall of the trench when preparing the isolation layer in the existing formation process, and improve the shape of the formed isolation layer. appearance

Images