Wafer cutting method
A cutting method and wafer technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., to achieve the effect of improving edge chipping and improving yield
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[0032] Silicon on insulator (SOI) technology can effectively resist transient radiation and single event radiation due to its full dielectric isolation structure, so it is the preferred technology for manufacturing radiation-hardened integrated circuits. Devices based on SOI substrates have the advantages of high speed, low operating voltage, low power consumption, and high temperature resistance. Therefore, SOI technology has great application prospects in submicron VLSI.
[0033] However, when a wafer formed based on the SOI technology is diced, the yield rate of chips obtained after dicing is low. The reason is analyzed in conjunction with a wafer cutting method.
[0034] Figure 1 to Figure 2 It is a structural schematic diagram corresponding to each step in a wafer cutting method.
[0035] refer to figure 1 , to obtain a wafer 10 to be diced, including an isolation layer 11 and a semiconductor device layer 12 on the isolation layer 11, the wafer 10 to be diced includes...
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