Connecting line representation method based on directed graph

Abstract

A connecting line representation method based on a directed graph comprises the following steps: reading a design file, and obtaining physical information and position information of a metal connecting line; creating a netlist graph according to the physical information and the position information of the metal connecting lines; traversing nodes of the netlist graph; processing the metal connecting wire; wherein the step of creating the netlist graph according to the physical information and the position information of the metal connecting wire further comprises the steps of establishing a hash table, reading a wiring point of the physical connecting wire of the metal wire, inquiring whether the wiring point is created or not in the hash table, and if a node corresponding to the wiring point is not found, creating a node corresponding to the wiring point in the hash table; and if the previous node is the head node or the current node is the first read-in node, regarding that the current node is the tail node, and otherwise, determining that the current node is the head node. According to the method, the connection relation of physical connection lines of the super-large-scale integrated circuit can be accurately expressed, and cross-metal-layer connection representation, perforation representation and virtual connection representation can be visually expressed.

Description

technical field [0001] The invention relates to the technical field of EDA (Electronic Design Automation, electronic design automation) tools for layout design of integrated circuits, in particular to the VLSI back-end design automation technology. Background technique [0002] As the semiconductor industry moves toward smaller and smaller feature sizes, and the number of transistors embedded in chips continues to grow, the semiconductor industry increasingly relies on electronic design automation for chip design. In the past thirty or forty years, electronic design automation (EDA: Electronic Design Automation) has been promoting the progress and development of chip design technology. EDA tools are mainly divided into three categories: front-end design tools, back-end design tools, and verification tools. In the back-end design tool, the main work is automatic placement and routing to meet the constraints of the circuit design. At present, the main back-end tools on the m...

AI Technical Summary

Problems solved by technology

Although this data model is the most intuitive representation of the physical model of metal wires, it takes up a lot of system memory and cannot intuitively represent its connection relationship

In addition, since the connection point of the metal connection line is the same routing point, direct storage will cause data redundancy

Linked storage requires a lot of traversal overhead and is not conducive to searching

And for the case where multiple lines are connected to each other, it cannot be easily expressed

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