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Preparation process of heterojunction solar cell

A technology for solar cells and preparation processes, which is applied in circuits, photovoltaic power generation, electrical components, etc., to achieve the effects of high solubility, promotion of capture, and excellent electrical conductivity

Inactive Publication Date: 2021-03-09
晋能光伏技术有限责任公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Based on the advantages of the above heterojunction cells, they have developed rapidly in recent years. Many leading companies in the industry have begun to deploy. After the efficiency reaches 23.8%, the original process route can no longer meet the current requirements for cell conversion efficiency. Pursuit, how to break through the existing process and preparation process to further improve the mass production efficiency of HJT batteries and accelerate the process of large-area industrialization is the challenge that HJT batteries are currently facing

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] A. Phosphorus gettering treatment is carried out on the N-type single crystal silicon wafer with a thickness of 180 μm. The deposition temperature is 750 ° C, and the advancing temperature is 900 ° C to form a diffusion layer with a depth of 0.5 μm and a square resistance of 70Ω, forming phosphorus diffusion on the front and back surfaces of the silicon wafer layer, post-pass HNO 3 and HF to remove the diffusion layer;

[0044] B. Texture treatment is carried out on the surface of the silicon wafer after the A process by using KOH, and the size of the suede surface is 3um.

[0045] C. Prepare the dual intrinsic amorphous silicon layer and doped amorphous silicon layer on the front and back by plasma chemical vapor deposition. The thickness of the intrinsic amorphous silicon on the front and back is 10nm, the thickness of P-type amorphous silicon is 15nm, and the thickness of N-type amorphous silicon The thickness of crystalline silicon is 20nm;

[0046] D. Deposit an ...

Embodiment 2

[0051] A. Phosphorus gettering treatment is performed on a single crystal silicon wafer with an N-type thickness of 180 μm. The deposition temperature is 800°C, and the advancing temperature is 900°C. The depth of the diffusion layer is 0.7 μm, and the square resistance is 50Ω. Phosphorus diffusion is formed on the front and back surfaces of the silicon wafer. layer, post-pass HNO 3 and HF to remove the diffusion layer;

[0052] B. Texture treatment is carried out on the surface of the silicon wafer after the A process by using KOH, and the size of the suede surface is 3um.

[0053] C. Prepare the dual intrinsic amorphous silicon layer and doped amorphous silicon layer on the front and back by plasma chemical vapor deposition. The thickness of the intrinsic amorphous silicon on the front and back is 10nm, the thickness of P-type amorphous silicon is 15nm, and the thickness of N-type amorphous silicon The thickness of crystalline silicon is 20nm;

[0054] D. Deposit an ITO fi...

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Abstract

The invention discloses a preparation process of a heterojunction solar cell, and the process comprises the following steps: carrying out phosphorus gettering treatment on a silicon wafer, depositingon the front and back surfaces of the silicon wafer to form a phosphorus diffusion layer, and then removing the phosphorus diffusion layer through acid etching; cleaning the surface of the silicon wafer through an alkaline solution to form texturing of the surface of the silicon wafer; depositing an amorphous silicon thin film layer on the front surface and the back surface of the textured siliconwafer; depositing a conductive film layer on the front surface and the back surface of the amorphous silicon film layer; covering metal electrodes on the front surface and the back surface of the conductive film layer; curing the metal electrode; and performing test sorting. According to the preparation process of the heterojunction solar cell provided by the invention, the influence caused by the silicon wafer quality problem in the production process is greatly improved, so that the conversion efficiency of the heterojunction solar cell is further improved.

Description

technical field [0001] The invention relates to the technical field of solar cell manufacturing, and more specifically relates to a preparation process of a heterojunction solar cell. Background technique [0002] With the development of solar cell technology, more and more attention has been paid to the development of high-efficiency cells. Among them, the silicon-based heterojunction solar cell (HJT cell) passivated by the intrinsic layer of amorphous silicon (a-Si:H(i)) is one of the key research directions. As we all know, silicon-based heterojunction solar cells not only have high conversion efficiency and high open circuit voltage, but also have low temperature coefficient, no light-induced degradation (LID), no electrical degradation (PID), low preparation process temperature, etc. Advantage. In addition, while ensuring high conversion efficiency, the thickness of silicon wafers can be reduced to 100 μm, which effectively reduces the consumption of silicon materials...

Claims

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Application Information

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IPC IPC(8): H01L31/18H01L31/072
CPCH01L31/1876H01L31/1804H01L31/072Y02E10/547
Inventor 黄金王继磊杨立友贾慧君白焱辉鲍少娟任法渊杨骥李文敏刘学飞
Owner 晋能光伏技术有限责任公司