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IGBT structure with trench emitter buried layer

An emitter and trench technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., to achieve the effect of suppressing dynamic avalanche, suppressing dynamic avalanche breakdown, and suppressing EMI noise interference

Inactive Publication Date: 2021-03-16
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Aiming at the requirement of suppressing EMI noise and dynamic avalanche during the use of IGBT, the present invention provides an IGBT structure with trench emitter buried layer

Method used

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  • IGBT structure with trench emitter buried layer
  • IGBT structure with trench emitter buried layer

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Embodiment Construction

[0013] The specific embodiments of the present invention are described below so that those skilled in the art can understand the present invention, but it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes Within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions and creations using the concept of the present invention are included in the protection list.

[0014] The present invention proposes a novel IGBT structure with a trench emitter buried layer, the cell structure of which is as follows figure 1 As shown, it includes a P-type collector region (1), an N-type buffer layer (2) above the collector region (1) and an N-type drift region (3), and a polysilicon gate is arranged in the drift region (3). Electrode (6) and gate oxide layer (5), metal emitter (11) and emitter oxide...

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Abstract

The invention discloses an IGBT structure with a trench emitter buried layer, and the structure enables an emitter to be made into a shallow trench structure on the basis of a conventional CSIGBT structure, adds two p-type doped regions MP and BP at the bottom of an emitter trench and the bottom of a gate trench, and on the basis of improves the concentration Ncs of a carrier storage layer, the gain of the amplified injection enhancement effect is retained and dynamic avalanche breakdown induced by Ncs increase is suppressed. The balance between the turn-off loss and the on-state voltage dropis optimized, and the interference of EMI noise is effectively suppressed.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to an IGBT structure with a trench emitter buried layer. Background technique [0002] Insulated gate bipolar transistor (Insulate Gate Bipolar Transistor, IGBT), as a key component in today's power electronics applications, has been highly concerned by scholars. Recently, some scholars proposed a new method to improve the performance of IGBT by amplifying the injection enhancement (Injection Enhancement, IE) effect. This method can not only reduce the operating loss, but also increase the current density of the IGBT module, realizing the turn-off loss and turn-on voltage drop V ce,sat better trade-off. While low turn-off losses (high dV / dt) can reduce system size, high current density and high dV / dt during turn-off can lead to dynamic avalanche. When the IGBT is in the on-state, the drift region has a high concentration of mobile carriers, which is much higher than the background d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/417H01L29/739
CPCH01L29/0684H01L29/41708H01L29/7397
Inventor 伍伟李岩松古湧乾
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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