Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Lateral double-diffused transistor and manufacturing method thereof

A lateral double-diffusion and transistor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of drain terminal breakdown, auxiliary depletion effects, and difficulty in further improving the performance of NLDMOS devices

Active Publication Date: 2021-04-02
JOULWATT TECH INC LTD
View PDF4 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, in the above-mentioned TRIPLE RESURF NLDMOS device structure, if the concentration of the floating P region is too high, the additional electric field on the surface near the drain terminal will increase, which will easily cause breakdown of the drain terminal; if the concentration of the floating P region is too low, it will Makes the on-resistance increase and the auxiliary depletion is also affected, resulting in reduced reliability of TRIPLE RESURF NLDMOS
At the same time, the RESURF in this scheme is realized by only using the P-type floating area, and it is difficult to further improve the performance of NLDMOS devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Lateral double-diffused transistor and manufacturing method thereof
  • Lateral double-diffused transistor and manufacturing method thereof
  • Lateral double-diffused transistor and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0087] Various embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0088] When describing the structure of a device in the present disclosure, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly above another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0089] If it is intended to describe a situation...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of semiconductors, and provides a lateral double-diffused transistor and a manufacturing method thereof. The formed lateral double-diffused transistor comprises: a buried layer, a first epitaxial layer and a second epitaxial layer which are sequentially formed on a substrate, and a plurality of isolation layers transversely arranged between the first epitaxial layer and the second epitaxial layer at intervals; a first drift region located in the second epitaxial layer, high-voltage well regions located on the two sides of the first drift region, anda plurality of floating doped regions transversely distributed in the first drift region at intervals; a plurality of grooves formed in the upper surface of the second epitaxial layer at intervals; and a plurality of body regions transversely distributed between two adjacent grooves on the second epitaxial layer at intervals, wherein each body region is in contact with isolation layers corresponding to the upper position and the lower position through the floating doped regions with the same doping type to form a body region with a super junction structure. According to the invention, the effects of enhancing body region depletion and RESURF can be realized in the device so as to obtain higher withstand voltage and lower on resistance, and the current capability of the device can be enhanced.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, in particular to a lateral double-diffused transistor and a manufacturing method thereof. Background technique [0002] The BCD (Bipolar-CMOS-DMOS) process manufactures bipolar devices and CMOS devices on the same chip at the same time. It combines the advantages of high transconductance and strong load driving capability of bipolar devices with high integration and low power consumption of CMOS, so that they learn from each other and give full play to their respective advantages. More importantly, it integrates DMOS power devices, and DMOS can work in switch mode with extremely low power consumption. High power can be delivered to the load without expensive packaging and cooling systems. Low power consumption is one of the main advantages of the BCD process. [0003] Lateral double-diffused MetalOxide Semiconductor Field-Effect Transistor (LDMOSFET) is a good semiconductor, wh...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/7816H01L29/7817H01L29/0603H01L29/0615H01L29/0684H01L29/66681
Inventor 陈斌
Owner JOULWATT TECH INC LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products