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Process for reducing silicon wafer edge polishing fragmentation rate

A chipping rate, silicon wafer technology, applied in the process field of reducing the edge polishing chipping rate of silicon wafers, can solve the problems of reduced production capacity, long cleaning time for employees, increased grinding time, etc., to reduce economic losses, improve edge roughness, improve The effect of fragmentation

Pending Publication Date: 2021-04-09
ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The object of the present invention is to provide a kind of technology that reduces the edge polishing debris rate of silicon wafer, to solve the above-mentioned background technology because the edge stress and thermal stress of incoming silicon wafer are relatively concentrated, and the physical characteristic of silicon wafer itself is brittle, so Whether the stress release is proper in the process of edge polishing is extremely important. Once self-damaged, in addition to the loss of the silicon wafer itself, it will also cause loss of polishing cloth, vacuum sealing ring, and vacuum gasket. The cost of these auxiliary materials is several times that of the silicon wafer itself. Loss, and after the debris, it takes a long time for employees to clean up, which consumes manpower and takes up a lot of processing time. The principle of 8-inch polishing discs producing debris in the side throwing process is: (1) The process setting is unreasonable, and the speed is too high resulting in excessive pressure or If the time is too long, the edge collapses: (2) The stress cannot be eliminated evenly, resulting in the concentrated release of the edge stress and fragments. At first, if the 8-inch polishing sheet has a rough facade during the edge polishing process, the general treatment method is to increase the edge polishing. Increase the liquid concentration or increase the grinding time, that is: (1) When the edge is found to be rough, increase the concentration of the side throwing liquid and increase the lower limit of PH; (2) increase the grinding time of the ROUND station, method (1) will increase the side throwing liquid The unit consumption, the method (2) will reduce the problem of production capacity

Method used

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  • Process for reducing silicon wafer edge polishing fragmentation rate
  • Process for reducing silicon wafer edge polishing fragmentation rate
  • Process for reducing silicon wafer edge polishing fragmentation rate

Examples

Experimental program
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Effect test

Embodiment 1

[0029] The experimental technique of the present embodiment comprises the following steps:

[0030] S1. First, weigh the 8-inch Czochralski silicon chip, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, and deionized water according to the weight ratio of the components, and place them in corresponding storage containers. Backup internally.

[0031] S2. Then place the 8-inch Czochralski silicon wafer on the BBS edge polishing machine for edge polishing. After the edge polishing is completed, the 8-inch Czochralski silicon wafer, ammonia water, hydrochloric acid, Hydrogen peroxide, hydrofluoric acid, and deionized water are introduced into the cleaning machine to clean the edge-throwing silicon wafers, and an appropriate cleaning solution is added during the cleaning process.

[0032] S3. Finally, the cleaned 8-inch Czochralski silicon wafer can be placed under a strong light, and the edge defects of the silicon wafer can be inspected by real-time observ...

Embodiment 2

[0047] The difference from Embodiment 1 is that:

[0048] The experimental technique of the present embodiment comprises the following steps:

[0049] S1. First, weigh the 8-inch Czochralski silicon chip, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid, and deionized water according to the weight ratio of the components, and place them in corresponding storage containers. Backup internally.

[0050]S2. Then place the 8-inch Czochralski silicon wafer on the BBS edge polishing machine for edge polishing. After the edge polishing is completed, the 8-inch Czochralski silicon wafer, ammonia water, hydrochloric acid, Hydrogen peroxide, hydrofluoric acid, and deionized water are introduced into the cleaning machine to clean the edge-throwing silicon wafers, and an appropriate cleaning solution is added during the cleaning process.

[0051] S3. Finally, the cleaned 8-inch Czochralski silicon wafer can be placed under a strong light, and the edge defects of the...

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Abstract

The invention discloses a process for reducing silicon wafer edge polishing fragmentation rate. The experimental process comprises the following steps of: S1, weighing an 8-inch Czochralski acid-corroded silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water according to a weight part ratio, and placing the weighed components in corresponding storage vessels for later use; S2, putting the 8-inch Czochralski acid-corroded silicon wafer on a BBS edge polishing machine for edge polishing treatment, after the edge polishing treatment is completed, introducing the weighed and proportioned 8-inch Czochralski acid-corroded silicon wafer, ammonia water, hydrochloric acid, hydrogen peroxide, hydrofluoric acid and deionized water into a cleaning machine for cleaning the edge-polished silicon wafer, and adding a proper amount of cleaning liquid medicine in the cleaning process; and S3, finally, placing the cleaned 8-inch Czochralski acid-corroded silicon wafer under a strong light lamp, observing and detecting the edge defect condition of the silicon wafer in real time, and placing the silicon wafer under a microscope.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a process for reducing the polishing debris rate at the edge of a silicon wafer. Background technique [0002] Edge polishing, that is, the edge polishing of silicon wafers, is mainly to remove the damaged layer and rough parts of the edge of silicon wafers by using the fluff polishing pad to carry silicon dioxide particles and lye to produce chemical removal and mechanical grinding. The process has three benefits for silicon wafers: first, edge polishing can reduce edge fragmentation caused by collisions during processing; second, it can obtain lower roughness on the edge surface of silicon wafers and reduce the adhesion of particles to the surface Contamination, thirdly, can eliminate the concentration of edge stress and prevent the concentration of thermal stress, and improve the product yield of subsequent processing, so the edge polishing process is an in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02
CPCH01L21/02013H01L21/02021
Inventor 陈良臻江笠王彦君孙晨光
Owner ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD
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