FPGA stream data verification method and device

A technology for data verification and verification methods, which is applied in electrical digital data processing, data representation error detection/correction, error detection coding, etc. error, ensuring completeness and accuracy

Active Publication Date: 2021-10-08
GOWIN SEMICON CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the code stream data may change during processing, storage and transmission. For example, if one or several data bits are wrong, if it is directly used to realize the function of the chip, the chip may not work normally, or even produce unpredictable consequences. , therefore, it is necessary to check in time whether there is an error in the code stream data written to the FPGA chip during storage and transmission, and to correct the error in time when an error occurs, so as to avoid abnormal operation of the FPGA chip due to code stream data errors
[0004] The existing verification method for code stream data can only confirm that there is a problem with the data written into the chip at the time, but cannot confirm the problem location, nor can it directly correct the error. It can only be resent by the sender to try to solve the problem, which takes a long time and is also Not conducive to subsequent improvement

Method used

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  • FPGA stream data verification method and device
  • FPGA stream data verification method and device
  • FPGA stream data verification method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] This embodiment relates to a method for verifying FPGA code stream data and a device for verifying FPGA code stream data. Both the FPGA code stream data verification method and the FPGA code stream data verification device are used to process the code stream data to be downloaded to the FPGA chip, which is hereinafter referred to as the verification process at the sending end.

[0037] figure 1 It is a schematic flowchart of an FPGA code stream data verification method for processing code stream data at a sending end in an embodiment of the present invention. see figure 1 , the FPGA code stream data checking method of the present embodiment comprises the following steps:

[0038] Step S11, receiving code stream data;

[0039] Step S12, adding the values ​​of the code stream data other than the configuration information to obtain a checksum, and adding the checksum to the configuration information of the code stream data;

[0040] Step S13, performing cyclic redundan...

Embodiment 2

[0058] This embodiment relates to a method for verifying FPGA code stream data. The method for verifying the FPGA code stream data is used to process the code stream data at the receiving end. Here the FPGA chip can be used as the receiving end. After the code stream data is downloaded to the FPGA chip, it is first stored in the random access memory (RAM) configured on the FPGA chip. In order to check whether the code stream data is wrong in the storage and transmission process of the sending end, the FPGA chip carries out the receiving end verification to the code stream data stored in the RAM, and the verification process of the receiving end can be passed through the control module (such as MCU) of the FPGA chip. , microcontroller) is implemented using software programs and / or programmable logic resources of FPGA chips.

[0059] image 3 It is a schematic flowchart of an FPGA code stream data verification method for processing code stream data at a receiving end in an em...

Embodiment 3

[0072] This embodiment relates to a method for verifying FPGA code stream data. The method for verifying the FPGA code stream data is used to process the code stream data at the receiving end.

[0073] Figure 4 It is a schematic flowchart of an FPGA code stream data verification method for processing code stream data at a receiving end in an embodiment of the present invention. see Figure 4 , the FPGA code stream data checking method of the present embodiment comprises the following steps:

[0074] Step S31: Obtain the code stream data at the receiving end, the code stream data includes a checksum, and each row of the code stream data includes a corresponding row CRC code, and each column of the code stream data includes a corresponding column CRC code ;

[0075] Step S32: Add the values ​​of the code stream data other than the configuration information to obtain the checksum at the receiving end, compare the checksum at the receiving end with the checksum in the code st...

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PUM

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Abstract

The invention relates to an FPGA code stream data verification method and an FPGA code stream data verification device. Combining the checksum check and row-column CRC cross check, on the basis of ensuring the integrity and accuracy of the code stream data, it can effectively detect whether there are errors in the code stream data during processing, transmission and storage, and can quickly find out Error location, and then perform error correction processing, realizing the self-error correction effect of code stream data. In addition, the code stream data is divided into blocks, and then the cyclic redundancy check is performed on each code stream data block in parallel, so as to improve the verification speed and improve the reliability of the FPGA design.

Description

technical field [0001] The invention relates to the field of FPGA development, in particular to an FPGA code stream data verification method and an FPGA code stream data verification device. Background technique [0002] The development of FPGA (Field Programmable Gate Array, Field Programmable Logic Gate Array) usually includes processes such as RTL (register transfer level) design, function simulation, logic synthesis, layout and routing, and board-level verification. The code stream data in binary format will be generated, and the code stream data will be downloaded to the corresponding FPGA chip according to the timing requirements of the device, so that specific functions can be realized. [0003] Whether the code stream data information is correct or not directly determines whether the function of the chip is correct. However, the code stream data may change during processing, storage and transmission. For example, if one or several data bits are wrong, if it is direc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/09G06F11/10G06F11/08
CPCG06F11/08G06F11/1004H03M13/09
Inventor 刘锴宋宁李锋马得尧杜金凤
Owner GOWIN SEMICON CORP LTD
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