Semiconductor device and forming method thereof

Abstract

The invention provides a semiconductor device and a forming method thereof. The forming method of the semiconductor device comprises the steps of providing a semiconductor substrate; forming a barrier layer on the semiconductor substrate; forming a shallow trench structure; performing planarization processing on the shallow trench structure through a DSTI CMP process; and removing the barrier layer. According to the invention, the planarization effect of the DSTI CMP process is better than that of the STI CMP process in the prior art, and the CMP dishing phenomenon does not occur on the grinding surface in the DSTI CMP process, so that the depth of the STI recess is small, thereby solving the problem that the MOSFET device is started earlier due to the concentration of the tip electric field of the STI recess area, namely reducing the leakage current of the MOSFET device.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are required to achieve faster computing speeds. With larger data storage capacity and more functions, semiconductor devices are developing towards higher component density and high integration, and the requirements for their physical structure and manufacturing process are also getting higher and higher. However, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) devices will have leakage problems. Among them, STI (shallow trench isolation, shallow trench isolation) depression (divot) is one of the causes of MOSFET device leakage. Generally speaking, the deeper the STI recess is, the more obvious the leakage current of the MOSFET device is. [0003] Such as figure 1 As shown, the gate ...

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Problems solved by technology

One of the reasons for the leakage caused by STI depression is that the gate oxide layer at the boundary between the active region (ACT) and the STI (that is, region a) is thinner. Specifically, the gate oxide layer is formed by thermal oxidation. The stress at the boundary between the region and STI is large, making it difficult for oxygen atoms to enter the active region, and form silicon dioxide with the silicon substrate in the active region, which eventually results in a thinner gate oxide layer at the boundary between the active region and STI , so that the device in this region is easier to turn on, and the leakage in this region increases accordingly; the second reason for the leakage caused by the STI recess is that in the subsequent process of forming the gate structure 11 at region a, due to the relatively high electric field at region a Concentration makes the devices in this area easier to turn on, and the leakage in this area increases accordingly

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