Deep trench isolation forming method of CIS device, and semiconductor device structure

A deep trench isolation and deep trench technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve problems such as difficult to meet process requirements, achieve the effect of improving the performance of CIS devices and optimizing the forming process

Active Publication Date: 2021-06-08
HUA HONG SEMICON WUXI LTD +1
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] For the small-sized pixel area, it will be limited by the aspect ratio of the photoresist during photolithography, and the de

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  • Deep trench isolation forming method of CIS device, and semiconductor device structure
  • Deep trench isolation forming method of CIS device, and semiconductor device structure
  • Deep trench isolation forming method of CIS device, and semiconductor device structure

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[0049] Next, the technical solutions in the present application will be described in conjunction with the accompanying drawings, as will be apparent from the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative labor are the scope of the present application.

[0050] In the description of this application, it is to be described in the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. The orientation or position of the indication is based on the orientation or positional relationship shown in the drawings, which is intended to facilitate the description of the present application and simplified description, rather than indicating or implying that the device or component must have a specific orientation. Construct and operation, so it is not understood as limiting the pres...

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Abstract

The invention discloses a deep trench isolation forming method of a CIS device, and a semiconductor device structure, and relates to the field of semiconductor manufacturing. The method comprises the following steps: growing a first epitaxial layer on a substrate; forming a hard mask layer; forming a plurality of deep grooves which are arranged vertically and horizontally in the first epitaxial layer; forming a second epitaxial layer in the deep trench; forming a first oxide layer on the surface of the second epitaxial layer in the deep trench; fully filling the deep trench with polycrystalline silicon; performing back etching on the substrate to expose the side wall of the first oxide layer in the deep trench; forming a second oxide layer on the top of the polycrystalline silicon; removing the first oxide layer above the hard mask layer and the second oxide layer; rapidly growing a third epitaxial layer; and performing CMP processing on the surface of the substrate, and forming deep trench isolation on the substrate. The problem that when deep trench isolation of a CIS device is formed in an epitaxial growth mode, the top of a deep trench crossing area is prone to having a sealing defect is solved. The formation process of the deep trench isolation is optimized, and the device performance is improved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, in particular to a method for forming deep trench isolation of a CIS device and a structure of a semiconductor device. Background technique [0002] CIS (CMOS Image Sensor, image sensor) is a device that converts optical signals into electrical signals. Due to the advantages of high integration, low power, and low cost, CIS devices are more and more widely used. [0003] The sensitivity of the CIS device is strongly related to the size of the pixel area. In order to increase the sensitivity of the small-sized pixel area, it is necessary to expand the space of the photodiode in the vertical direction. At present, when forming the pixel area of ​​a CIS device, the pattern of the pixel area is firstly defined by a photolithography process, and then the pixel area is formed by an ion implantation process. [0004] For small-sized pixel areas, the aspect ratio of the photoresist ...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L27/146
CPCH01L27/1463H01L27/14687H01L21/76237H01L27/14689H01L21/76205H01L21/76221H01L21/763H01L21/76202H01L21/76224
Inventor 李佳龙黄鹏范晓钱文生
Owner HUA HONG SEMICON WUXI LTD
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