Fractional frequency division reference sampling frequency synthesizer based on voltage mean value

Abstract

The invention discloses a fractional frequency division reference sampling frequency synthesizer based on a voltage mean value. The synthesizer includes a reference clock input end, a common-mode voltage input end, a frequency division control word input end, a carrier signal output end, a reference sampling phase discriminator array, a voltage-current conversion module, a low-pass filter, a voltage-controlled oscillator, an output buffer, a frequency division and double-phase generator, a phase selector, a phase discrimination control module and a frequency division and phase selection control module. The synthesizer can effectively suppress the phase noise of an output signal.

Description

technical field [0001] The invention belongs to the field of electronic technology and relates to a fractional frequency division reference sampling frequency synthesizer based on voltage mean value. Background technique [0002] Frequency synthesizer is one of the important functional modules in radio frequency / microwave wireless communication system, which is widely used in the generation of carrier signal and clock signal. Because phase-locked loops have many advantages such as good frequency tracking characteristics, low phase noise, small spurious components, and high system stability, today's frequency synthesizers are mainly implemented based on phase-locked loop structures. [0003] Compared with the traditional integer frequency division PLL, the fractional frequency division PLL breaks the limitation of the output signal frequency and the output reference clock frequency in the traditional phase locked loop, making the frequency synthesizer based on the fractional ...

AI Technical Summary

Problems solved by technology

However, due to the lack of a divider, this structure cannot directly perform fractional division

In order to achieve fractional frequency division, the sub-sampling PLL needs to use a digital-to-time converter to perturb the input reference clock. However, the digital-to-time converter introduces additional noise and nonlinear distortion, which deteriorates the phase noise characteristics of the input reference clock. , which in turn affects the phase noise characteristics of the overall frequency synthesizer

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