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Semiconductor structure and forming method thereof

A semiconductor and sacrificial layer technology, which is applied in the field of semiconductor structure and its formation, can solve the problems such as the need to improve the performance of transistors

Pending Publication Date: 2021-07-06
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the performance of fin field effect transistors with trench gate surround structure in the prior art needs to be improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0040]As mentioned in the background, the performance of the fin field effect transistor with surrounding trench gate structure needs to be improved in the prior art. Now analyze and illustrate in conjunction with specific embodiment.

[0041] figure 1 It is a schematic cross-sectional structure diagram of a semiconductor structure.

[0042] Please refer to figure 1 , including: a substrate 100 with a fin structure on the substrate 100, the fin structure including a first nanowire 101 and a second nanowire 102 on the first nanowire 101; surrounding the first nanowire The gate structure of the wire 101 and the second nanowire 102, the gate structure includes a gate dielectric layer 103, a work function layer 104 on the gate dielectric layer 103, and a gate layer 105 on the work function layer 104; The side walls 106 on the side walls of the gate structure; the source-drain doped layer 107 located in the fins on both sides of the gate structure; the dielectric layer 108 locat...

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PUM

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Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which is internally provided with first ions; forming an initial first sacrificial layer on the substrate; forming a composite layer on a part of the initial first sacrificial layer; removing part of the initial first sacrificial layer on the surface of the substrate, and forming a first sacrificial layer and a first isolation opening located between the bottom of the composite layer and the surface of the substrate, wherein the side wall of the first sacrificial layer is sunken relative to the side wall of the composite layer; and after the first isolation opening is formed, forming a doped region in the portion, exposed out of the first isolation opening, of the substrate, arranging second ions in the doped region, wherein the type of the second ions is the same as that of the first ions, and the concentration of the second ions is larger than that of the first ions. The method can improve the performance of the semiconductor structure.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the development of semiconductor technology, the control ability of the traditional planar metal-oxide semiconductor field effect transistor on the channel current becomes weaker, resulting in serious leakage current. Fin Field Effect Transistor (Fin FET) is an emerging multi-gate device, which generally includes a fin protruding from the surface of the semiconductor substrate, and a gate structure covering part of the top surface and sidewall of the fin, located at The source and drain doped regions in the fins on both sides of the gate structure. Compared with planar metal-oxide semiconductor field effect transistors, fin field effect transistors have stronger short-channel suppression capability and stronger operating current. [0003] With the further development of semicond...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78H01L21/265
CPCH01L29/785H01L29/66795H01L21/26506
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP