Resource attribute code matching correctness verification method and device, medium and equipment

Abstract

The invention provides a resource attribute code matching correctness verification method and device, a medium and equipment. The method comprises the following steps: analyzing a module resource attribute file to obtain a module name and a resource attribute value of each module; finding a code matching value generation command corresponding to each module from the code matching configuration file to form a command file and a command file list; writing the command file path address and the log file path address into a code matching execution file; and running the code matching execution file, comparing the actual code matching value in the log file with the code matching value in the command file list, if the actual code matching value is consistent with the code matching value in the command file list, matching the code correctly, if the actual code matching value is inconsistent with the code matching value in the command file list, matching the code unsuccessfully, and writing the circuit project with the unsuccessfully matched code and the code matching value into a result file. Through the thought of software verification, batch automatic verification of the circuit is realized, verification time is greatly saved, test time and energy of test personnel are saved, and code matching verification speed and test coverage rate are improved.

Description

technical field [0001] The invention belongs to the technical field of programmable logic devices, and in particular relates to a method, device, medium and equipment for verifying correctness of resource attribute coding. Background technique [0002] The main function of the FPGA EDA (Field-Programmable Gate Array Electronics DesignAutomation, field programmable gate array electronic design automation) tool is to convert the specific circuit design into a netlist file (the netlist file is a file describing the connection relationship of the circuit, generally It is a text file. Simply put, it translates the schematic diagram into a text file. The file will contain the device's label, package, and connection relationship. This file is imported into the PCB (Printed Circuit Board, printed circuit board) editor. The corresponding package will be taken out from the package library, and the corresponding label and connection relationship will be given), and then the netlist fil...

AI Technical Summary

Problems solved by technology

[0003] The resource attributes of each module in each project need to be configured with codes. The corresponding functions will be realized and sub-branched after the codes are successfully configured. If the codes fail, the configured functions will not work accordingly, but each attribute value should be Where is the configuration and what value should be configured? Testers need to compare the configuration files one by one. If the tester manually compares the resource attributes of each module, it will consume a lot of time and energy. , and the manual comparison is very likely to be wrong, even if the simulation can verify whether each value is correctly matched, but from the perspective of execution time, the simulation will take a lot more time

Images