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Sapphire substrate manufacturing method

A technology of a sapphire substrate and a manufacturing method, which is applied in the directions of electrical components, circuits, semiconductor devices, etc., can solve the problem of high cost of single-chip production

Inactive Publication Date: 2022-02-18
JIANGXI ZHAO CHI SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Based on this, the purpose of the present invention is to provide a method for manufacturing a sapphire substrate, which is used to solve the problem in the prior art that the products after multi-wire cutting need to undergo double-sided grinding before the subsequent production process can be carried out, resulting in single-chip production costs. high technical issues

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Embodiment 1

[0089] The sapphire substrate manufacturing method among the present embodiment comprises the following steps:

[0090] Obtain the wafer that has been cleaned after wire cutting, and clean the wafer that has been cleaned after wire cutting at a temperature of 130°C before annealing. The cleaning time is 10 minutes, and then anneal the wafer at a temperature of 1600°C. The time is 720 min; according to the wafer specification data, the wafer after the annealing treatment is subjected to wire-cutting and subdivision processing, and the subdivision-processed wafers are screened to obtain the screened wafers. The yield rate of the screened wafers is 100 %, the screened wafers include wafers of the first specification, and the wafer specification data of the wafers of the first specification are: Bow=-3.42 μm, Warp=12.5 μm, thickness=712.5 μm, TTV=7.5 μm; for the first specification The standard wafer is chamfered, and the sapphire substrate is obtained through the chamfered wafer....

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Abstract

The invention provides a sapphire substrate manufacturing method, and the method comprises the steps: obtaining a wafer which is cleaned after wire cutting, carrying out the cleaning before annealing of the wafer which is cleaned after wire cutting, and carrying out the annealing treatment of the wafer; according to the wafer specification data, carrying out wire cutting and then dividing on the annealed wafers, screening the wafers subjected to division, and obtaining the screened wafers of the first specification; and chamfering the first specification wafer to obtain the sapphire substrate. According to the sapphire substrate manufacturing method, the wafer subjected to linear cutting is detected according to the wafer specification data to obtain the wafer of the first specification, the wafer of the first specification is chamfered, the sapphire substrate is obtained through the chamfered wafer, double-sided grinding is not needed, the manufacturing technological process is simplified, and the technical problem that in the prior art, after multi-line cutting, all products need to be subjected to double-face grinding, then subsequent production procedures can be conducted, and the single-piece production cost is high is solved.

Description

technical field [0001] The invention relates to the field of chip technology, in particular to a method for manufacturing a sapphire substrate. Background technique [0002] With the development of process technology in the LED field and the rapid growth of the entire LED industry, research on PSS substrates for GaN-based LED devices has gradually increased. [0003] Patterned sapphire substrate, referred to as PSS (Patterned Sapphire Substrate), is to grow a mask for dry etching on a sapphire substrate, use a standard photolithography process to carve out a pattern, and use ICP etching technology to etch Sapphire, remove the mask, and then grow GaN material on it, so that the vertical epitaxy of GaN material becomes lateral epitaxy. On the one hand, it can effectively reduce the dislocation density of the GaN epitaxial material, thereby reducing the non-radiative recombination of the active area, reducing the reverse leakage current, and improving the life of the LED; on t...

Claims

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Application Information

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IPC IPC(8): H01L33/00
CPCH01L33/007
Inventor 吴琼琼张丙权崔思远金从龙
Owner JIANGXI ZHAO CHI SEMICON CO LTD
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