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Preparation method of semiconductor device and semiconductor device

A semiconductor and conductive layer technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of metal bonding scheme device damage, high cost, structural cracking, etc., to reduce the risk of damage. high risk, density and firm reliability, the effect of increasing mechanical strength

Pending Publication Date: 2022-03-11
李勇
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0018] In view of this, the present invention provides a method for preparing an integrated semiconductor device and an integrated semiconductor device, using non-metallic bonding means to solve the problem of high cost and limited integration density of the patterned metal alignment bonding solution, and the entire surface of the metal Leakage and device damage of the bonding scheme, as well as issues such as wafer warpage, structural cracking and faults caused by metal bonding

Method used

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  • Preparation method of semiconductor device and semiconductor device
  • Preparation method of semiconductor device and semiconductor device
  • Preparation method of semiconductor device and semiconductor device

Examples

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Embodiment 1

[0151] Such as image 3 As shown, the embodiment of the present invention provides a method for manufacturing an integrated semiconductor device, which mainly includes the following steps:

[0152] Step 101, providing a first substrate, and forming a first non-metallic bonding material layer on the surface of the first substrate;

[0153] Step 102, providing a second substrate, and forming a device material layer on the surface of the second substrate;

[0154] Step 103, forming a second non-metallic bonding material layer on the surface of the device material layer;

[0155] Step 104, bonding the second non-metallic bonding material layer and the first non-metallic bonding material layer to form a non-metallic bonding layer;

[0156] Step 105, removing the second substrate;

[0157] Step 106 , performing patterned etching on the device material layer to obtain a device layer containing at least one semiconductor device.

[0158] In an optional embodiment, the material of ...

Embodiment 2

[0245] Such as Figure 6 As shown, the preparation method of the copolar semiconductor device according to the embodiment of the present invention mainly includes the following steps:

[0246] Step 201, providing a first substrate, and preparing a first bonding conductive material layer on the surface of the first substrate;

[0247] Step 202, providing a second substrate, and preparing a device material layer on the surface of the second substrate, the device material layer at least including a first electrode layer away from the second substrate;

[0248] Step 203, preparing a second bonding conductive material layer on the surface of the first electrode layer;

[0249] Step 204, bonding the second bonding conductive material layer and the first bonding conductive material layer to form a bonding conductive layer;

[0250] Step 205: Perform patterned etching on the device material layer from the side of the second substrate to obtain a device layer containing at least two ...

Embodiment 3

[0321] Such as Figure 13 As shown, the method for preparing a compound semiconductor device provided by the embodiment of the present invention mainly includes the following steps:

[0322] Step 301: Provide a first substrate, and prepare a semiconductor stack structure on the entire surface of the first substrate. The semiconductor stack structure includes a transition semiconductor layer stacked outward from the surface of the first substrate, a semiconductor layer of the first conductivity type, and a second conductivity type semiconductor layer. type semiconductor layer;

[0323] Step 302: Perform patterned etching on the semiconductor stack structure from the side of the semiconductor layer of the second conductivity type to form a first patterned etched structure exposed to the semiconductor layer of the first conductivity type, wherein the first patterned etched structure runs through The second conductivity type semiconductor layer does not penetrate through the firs...

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Abstract

The invention discloses a preparation method of a semiconductor device and the semiconductor device, and the method comprises the steps: providing a first substrate, and forming a first nonmetal bonding material layer on the surface of the first substrate; providing a second substrate, and forming a device material layer on the surface of the second substrate; forming a second non-metal bonding material layer on the surface of the device material layer; bonding the second non-metal bonding material layer and the first non-metal bonding material layer to form a non-metal bonding layer; removing the second substrate; and performing graphical etching on the device material layer to obtain a device layer containing at least one semiconductor device. Through the non-metal bonding mode, the problem of electric leakage caused by overflowing of graphical etching metal and cleaning of metal particle residues after metal bonding is avoided, through the non-metal bonding mode, an effective etching high selection ratio is formed, a process window is increased, and feasibility is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for preparing a semiconductor device and the semiconductor device. Background technique [0002] At present, there are two main schemes for realizing monolithic integration: patterned metal alignment bonding and full-surface metal bonding. Both patterned metal alignment bonding and full-surface metal bonding solutions have the following disadvantages. [0003] The equipment and manufacturing costs of the patterned metal alignment bonding scheme are high, and there are high requirements on the density of integrated devices. [0004] The whole-surface metal bonding scheme will form a variety of complex crystal phases during the bonding process. The general dry etching equipment cannot meet the etching requirements, and then it adopts the electron beam etching scheme. During the metal etching process It is easy to cause device leakage problems caused b...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/48H01L21/50H01L23/31
CPCH01L21/4814H01L21/50H01L23/3121
Inventor 李勇陈京华
Owner 李勇