GPP diode chip production process adopting honeycomb photomask and knife scraping method

[0046] Example 1

[0047]In this embodiment, a production process of GPP diode chip using honeycomb lithography and knife scraping method is provided. In this production process, a hexagonal honeycomb double-groove lithography mask suitable for negative glue is adopted. The hexagonal honeycomb double-groove lithography mask includes a first mask and a second mask, wherein the first mask is used for the first exposure, and the second mask is used for the second overprint exposure. The lithography mask can be used in the knife scraping process of GPP glass packaging, and only one exposure machine is needed to complete the first exposure and the second overprint exposure to realize overprint.

[0048] In order to understand the process flow of the subsequent GPP diode chip production process of the present invention, firstly, the concrete structures of the first mask and the second mask in the hexagonal honeycomb double-groove lithography mask are introduced.

[0049] such as Figure 2 As shown in the figure, the first mask includes a first transparent substrate 1 and a first photoetching mask layer 2 covering the surface of the first transparent substrate 1, and the first photoetching mask layer 2 has a first honeycomb pattern spliced by first regular hexagonal pattern units. All single first regular hexagonal pattern units have the same structure, such as Figure 3 As shown in, it is a schematic diagram of a single first regular hexagonal pattern unit. In a single first regular hexagonal pattern unit, all the six side edges of the hexagon are opaque lines, and the enclosed areas of the six side edges are transparent areas. at Figure 2 Among them, the opaque lines are identified by the mark 201, the transparent areas are identified by the mark 202, and the six opaque lines actually form a hexagonal frame, while the transparent areas inside are hexagonal surfaces. In addition, in the first honeycomb pattern, the side edges between adjacent first regular hexagonal pattern units do not overlap. such as Figure 4 As shown in, a local area composed of seven first regular hexagonal pattern units is illustrated, in which any two adjacent first regular hexagonal pattern units are kept at intervals, so that there is a light-transmitting line between two parallel opaque lines which are close to each other in two first regular hexagonal pattern units, and the light-transmitting line is identified by the mark 203. Therefore, in the first honeycomb pattern, there are two opaque lines on both sides of any transparent line. In the process of photolithography, negative photoresist is coated on the wafer, and the negative photoresist corresponding to the transparent area in the first photolithography mask layer 2 is exposed, while the negative photoresist corresponding to the opaque area is not exposed. The exposed photoresist remains after being treated by the developing solution, and the unexposed photoresist is removed by the fixing solution, that is, the photoresist corresponding to the opaque line identified by the mark 201 is removed to form an etching channel. Then, dry/wet etching is performed to etch the front of the etched channel, and the channel can be formed on the wafer. As a result, formed Figure 5 In the wafer structure shown, there are two channels 6 between any two adjacent chip mesas 5, which is the so-called double channel in the present invention, and there is a cutting surface 7 between the two channels 6. The formation of this cutting surface 7 enables the wafer to be directly cut on the front side by laser to obtain a hexagonal chip, without artificial splitting on the back side. In the first mask, the chip mesa 5, the channel 6 and the cutting surface 7 respectively correspond to the areas corresponding to the mark 202, the mark 201 and the mark 203.

[0050] such as Figure 6 As shown in the figure, the second mask includes a second transparent substrate 3 and a second photoetching mask layer 4 covering the surface of the second transparent substrate 3, and the second photoetching mask layer 4 has a second honeycomb pattern spliced by second regular hexagonal pattern units. such as Figure 7 As shown in, a local area composed of seven second regular hexagonal pattern units is illustrated, and all single second regular hexagonal pattern units have the same structure. Contrary to the second regular hexagonal pattern unit, in a single second regular hexagonal pattern unit, all six side lines are light-transmitting lines, and the enclosed areas of the six side lines are light-transmitting areas. at Figure 7 In, the light-transmitting lines are identified by the mark 401, and the opaque areas are identified by the mark 402. The six light-transmitting lines actually form a hexagonal frame, while the opaque areas inside are hexagonal surfaces. In addition, in the second honeycomb pattern, the side edges between adjacent second regular hexagonal pattern units are not overlapped, and any two adjacent second regular hexagonal pattern units are kept at a distance, so that there is an opaque line between two parallel transparent lines which are close to each other in two second regular hexagonal pattern units, and the opaque line is identified by the mark 403. Therefore, in the second honeycomb pattern, there are two transparent lines on both sides of any opaque line, which is just opposite to the first honeycomb pattern.

[0051] The first mask plate and the second mask plate are used to realize chip cutting by two exposures in succession through the overprint process. Figure 2 Each black line is a groove after the photoetching groove processing, so the side of each chip unit will have a double groove structure, and the blank area between the two black lines is the cutting surface 7. Figure 6 A black line is left between two units in the secondary overprint layout of. After the secondary overprint etching is completed, the corresponding position of the black line between the two units will get the front cutting lane, and the hexagonal black area in the center of each unit will get the chip mesa for surface metallization and electrode welding in the subsequent packaging process. Therefore, the first regular hexagonal pattern units in the first honeycomb pattern can overlap with the second regular hexagonal pattern units in the second honeycomb pattern in one-to-one correspondence, but their light-transmitting areas and light-opaque areas are just opposite, so as to facilitate overprint.

[0052] It should be noted that the materials of the first mask and the second mask are not limited. The materials of the first transparent substrate 1 and the second transparent substrate 3 can be soda glass, Shi Ying glass or borosilicate glass, while the materials of the first lithography mask layer 2 and the second lithography mask layer 4 can be metal mask materials. In this embodiment, the materials of the first transparent substrate 1 and the second transparent substrate 3 are preferably Shi Ying glass, while the first photoetching mask layer 2 and the second photoetching mask layer 4 are preferably chrome layers with hollowed-out patterns, in which all opaque areas including lines and hexagons have continuous chrome layers, while all transparent areas including lines and hexagons are hollowed out without chrome layers. Generally speaking, the first lithography mask layer 2 can be plated on one side surface of the first transparent substrate 1, the second lithography mask layer 4 can be plated on one side surface of the second transparent substrate 3, and the preferred mask layer can be plated on the respective bottom surfaces of the two substrates.

[0053] In addition, the size parameters of the first mask and the second mask can be adjusted according to the actual customer requirements and parameter requirements. Generally speaking, the line widths of opaque lines and transparent lines can be set to 4 ~ 5 mil, too large will lead to waste of materials, while too small may cause cutting difficulties. In the preferred design of this embodiment, the line widths of opaque lines and transparent lines can be set to 4.5mil, and the double overprint exposure counter-plate specification is regular hexagon H198mil, and the fillet radian is r = 13 mil, which is the same as the mesa and welding surface finally obtained by the conventional regular hexagonal H220 chip, so there will be no difference in the electrical parameters (especially the forward voltage drop and surge resistance) of the chip.

[0054] The manufacturing process of the above-mentioned hexagonal honeycomb double-groove photoetching mask can be realized by the existing photoetching mask manufacturing process, which is not limited. The following is a common process flow:

[0055] 1) draw and generate a mask layout file that can be recognized by the equipment.

[0056] 2) reading the layout file by using a maskless mask aligner, performing non-contact exposure on the blank mask with glue, and irradiating the required pattern area on the mask to make the photoresist in this area have photochemical reaction.

[0057] 3) After developing and fixing, the photoresist in the exposed area dissolves and falls off, exposing the underlying chromium layer.

[0058] 4) Wet etching is carried out by using chromium etching solution, and the exposed chromium layer is etched to form a light-transmitting area, while the chromium layer protected by photoresist will not be etched to form an opaque area. Thus, planar pattern structures with different light transmittance, namely the first honeycomb pattern and the second honeycomb pattern, are formed on the mask.

[0059] It should be noted, however, that the above-mentioned manufacturing process of photolithography mask is only for convenience of understanding, and is not a limitation of the present invention.

[0060] Based on the specific structures of the first mask and the second mask, the following details the specific steps of the manufacturing process of GPP diode chips using honeycomb lithography and knife scraping in this embodiment:

[0061] S1, selecting negative photoresist as photoresist, and uniformly coating the photoresist on the etched surface of the original wafer by using a photoresist leveling device to form a first photoresist layer.

[0062] It should be noted that the etching surface of the wafer can be selected according to actual needs. The wafer has two sides of boron and phosphorus, and which side is the etching surface needs to be adjusted according to the actual situation. For example, automotive diodes are often partially etched by boron and partially etched by phosphorus, and then stacked in the subsequent packaging process.

[0063] After the etching surface is confirmed, the full-automatic basket arranging equipment can be used to basket the wafers to be produced, with the etching surface facing upwards, so as to directly carry out automatic glue leveling. The original wafer was cleaned in advance and dried at 180℃ before being coated with photoresist, which not only ensured the drying moisture, but also ensured that the surface had no free -OH hydroxyl bond. The thickness of the first photoresist layer can be optimized according to the actual situation. In this embodiment, the thickness of the first photoresist layer on the wafer surface after coating is preferably controlled at about 1.6 0.3 μ m.

[0064] S2, placing the first mask in a mask aligner, and printing a light-transmitting pattern on the first mask on the first photoresist layer on the etched surface of the original wafer through a photoetching process.

[0065] It should be noted that here, the so-called light transmission pattern is printed on the first photoresist layer on the etched surface of the original wafer, which does not mean that there is a real pattern on the first photoresist layer, but that the first photoresist layer is patterned and exposed according to the mapping relation corresponding to the light transmission pattern in the photolithography process. Because the negative glue is used, the exposed part is cross-linked and cured, and then the unexposed part can be removed with developer and fixer.

[0066] S3, treating the first photoresist layer after photoetching treatment in S2 with a developing solution to remove the unexposed photoresist, then washing the developing solution containing photoresist impurities with a fixing solution, and drying.

[0067] In this embodiment, since the photoresist is negative, the negative developer which can remove the unexposed photoresist is also used as the developer.

[0068] In addition, in the present invention, besides the etched surface, the other surface of the wafer, that is, the non-etched surface, can also be protected by photoresist to prevent the non-etched surface from being eroded by etching solution during the etching process. In the traditional process, because the back of the wafer is cut with a grinding wheel, it is necessary to align and expose both sides at the same time, that is, the front side is the etching surface and the back side is the cutting surface. However, after the invention is adopted, it is only necessary to protect the back surface with recycled glue at most, and its function is only to prevent acid. It is estimated that this method can save about 20% photoresist cost compared with the traditional process. Moreover, because the double-sided mask aligner has high requirements for light source, spindle and symmetry precision, its price is more than 1.5 times that of the single-sided mask aligner. After adopting the invention, the single-sided mask aligner can replace the double-sided mask aligner in production, which greatly reduces the purchase cost of mask aligner.

[0069] S4, etching the wafer processed by S3 by dry etching or wet etching, so that etching grooves are formed in the areas of the etched surface of the first patterned wafer that are not covered with photoresist, and the hexagonal etching grooves are enclosed to form a hexagonal chip mesa, and two spaced etching grooves are arranged between any two adjacent chip mesas, and the two etching grooves are separated by a line-shaped cutting surface. After etching, the photoresist on the wafer surface is removed with stripping solution.

[0070] In this embodiment, plasma can be used for thin film etching in dry etching, while HNO nitrate can be used in wet etching. 3 And the silicon on the surface of the wafer is etched by the mixed etching solution of hydrofluoric acid HF, and both etching methods can be used. Generally speaking, the accuracy of dry etching is high, while the production cost of wet etching is low.

[0071] In addition, due to the existence of the double grooves, the etching temperature of the double grooves needs to be reduced, which is generally below minus 10 DEG C.. In the process of etching, it is necessary to remove the etched mesa to the PN junction, and ensure that the PN junction of the whole chip has been completely exposed. After confirmation, the photoresist can be removed with stripping solution.

[0072] As mentioned above, in the traditional process, it is mentioned that double-sided exposure is required. Then, in the process of wet and dry etching, shallow etching is required first, and the back side is cut out. Then, the back side is protected by photoresist (recycled glue can be used) to prevent acid. However, the process of the invention does not need a shallow etching process, which can save 5-10% of the etching cost, and the smaller the chip size, the more the cost will be saved.

[0073] S5, filling glass powder in the etching groove of the wafer surface treated in S4 by knife scraping method, and forming glass passivation protection on the wafer surface and the etching groove after sintering.

[0074] In this step, glass powder can be made into glass slurry, and then it is scraped and coated with a scraper to fill in the etching tank. Because the pattern in the invention has a honeycomb structure, and the curing shrinkage rates of glass and silicon wafers are different, it is easy to cause uneven shrinkage in six directions of the honeycomb chip and increase the fracture stress during the cooling process. Therefore, the invention preferably adopts high-pressure resistant glass powder, which is mixed with solvent diethylene glycol monobutyl ether and plastic powder ethyl cellulose to obtain high-pressure glass paste. The curing shrinkage of the high-pressure glass paste is small, which can effectively prevent the rapid shrinkage of the glass in the etching tank relative to the silicon wafer.

[0075] In addition, compared with the conventional knife scraping process, the double grooves in the invention are narrower, so when the automatic knife coater is used to scrape and coat the glass slurry, it is necessary to lengthen the residence time so as to facilitate the complete coverage of the etching groove by the glass slurry.

[0076] The wafer with glass paste can be sent into a high-temperature passivation furnace during sintering, and the high temperature above 860℃ can firmly combine the glass with the groove.

[0077] It should be noted that after sintering, there will be a layer of glass on the wafer surface (including the hexagonal chip table and cutting surface) besides the glass in the etching groove, that is, the wafer surface is a glass-silicon combination, which cannot be welded or cut by a single laser source. Therefore, it is necessary to remove the glass on the mesa and the cutting surface of the hexagonal chip through the secondary overprinting and secondary etching, so as to obtain the welding surface and the cutting surface.

[0078] S6, uniformly coating photoresist on the etched surface of the wafer processed in S5 again to form a second photoresist layer.

[0079] In this step, the type and thickness of photoresist can be consistent with S1.

[0080] S7, placing the second mask in the mask aligner, and printing the light-transmitting pattern on the second mask on the second photoresist layer on the etched surface of the wafer through the overprint process.

[0081] It should be noted that the position of the second mask in the mask aligner should meet the requirements of overprinting with the first mask. During overprinting, the mapping areas of the second regular hexagonal pattern units in the second honeycomb pattern and the first regular hexagonal pattern units in the first honeycomb pattern on the wafer should overlap one by one to meet the requirements of overprinting.

[0082] S8, treating the second photoresist layer after the overprint treatment in S7 with a developing solution to remove the unexposed photoresist, then washing the developing solution containing photoresist impurities with a fixing solution, and drying.

[0083] In this embodiment, since the photoresist is negative, the negative developer which can remove the unexposed photoresist is also used as the developer.

[0084] S9. Etching the surface of the wafer treated in S8 with buffer oxide etching solution, removing the glass layer covered on the chip mesa and cutting surface, and exposing the chip mesa and cutting surface.

[0085] Different from the main purpose of the first dry/wet etching in S4, NH with ammonium fluoride is used for the second etching in this step.4 F and hydrofluoric acid HF (i.e. BOE etching solution), the purpose of which is to treat glass-silicon, remove the glass layer and expose the silicon surface, that is, to expose the chip mesa used for surface metallization and the cutting surface used for subsequent laser cutting.

[0086] S10, placing the wafer processed in S9 in an evaporation table, metallizing both surfaces of the wafer, and then performing laser cutting along the cutting surface of the etched surface by using a laser cutting device. After all the cutting surfaces of the whole wafer are cut, a series of hexagonal GPP diode chip particles can be formed without artificial splitting.

[0087] It should be noted that when laser cutting the cutting surface with laser cutting equipment, it is necessary to cut along its centerline, so that the cutting surface is left and right symmetrical after being cut.

[0088] For the hexagonal honeycomb double-groove lithography mask provided in this embodiment, since the layout of hexagonal honeycomb is introduced into the layout, the utilization rate of the wafer can be greatly improved. Traditional lithographic mask layout based on Figure 1 In, each hexagon will have six small triangles, so after splitting, small triangle waste will be produced, which is a very serious loss and waste. However, there is no waste of small triangular chips in the honeycomb layout structure, which can greatly increase the utilization rate of one chip. Figure 1 Under the shown photoetching mask, the dot rate of hexagonal H220mil chips is 195, but the invention Figure 2 and Figure 6 Under the lithography mask of the same size shown, the dot rate of hexagonal H220mil chips is 253. According to the invention, the number of chips can be increased by (253-195)/195 = 29.7% for the same chip; moreover, the above calculation is aimed at the hexagonal H220mil large-size chip, and for the small hexagonal H42mil chip, the chip dot rate is increased even more. After calculation, Figure 1 Under the lithography mask shown, the dot rate of hexagonal H42 chips is 5940; However, the invention Figure 2 and Figure 6 Under the same size lithography mask, the dot rate of hexagonal H42 chips is 7956, which can increase the number of chips by 33.9%.

[0089] Moreover, since the chip after the second overprint of the invention has the front cutting path, the chip can directly adopt the full-automatic laser (the laser can freely cut any pattern and can be controlled by computer to freely turn, while the traditional cutting machine can only cut straight lines), and the hexagonal honeycomb arrangement can be quickly cut at a speed of > 100mm/s, and the complete core particles can be directly obtained, which does not need to increase the link of artificial splitting, thus greatly reducing various costs.

[0090] Therefore, in this embodiment, the hexagonal honeycomb arrangement, which is only used in the traditional OPEN JUNCTION pickling process, is applied to the GPP glass packaging process through the design of the lithography mask, and by introducing double grooves, the wafer can be cut by laser after the glass protection of the knife scraping process is completed. This process has the advantages of simple operation, low input cost of equipment auxiliary materials, greatly improving the use efficiency of wafers, increasing the cutting speed of products, and significantly improving the economic benefits of products.

[0091] Example 2

[0092] In this embodiment, a production process of GPP diode chip using honeycomb lithography and knife scraping method is provided. The difference between this process and Embodiment 1 is that it is suitable for positive glue, so the hexagonal honeycomb double groove lithography mask used in this process should also match the positive glue.

[0093] Specifically, in this embodiment, the structures of the first mask and the second mask are basically the same as those of Embodiment 1, with the only difference being that the light transmittance types of the light-transmitting areas and the light-opaque areas in the first lithography mask layer 2 and the second lithography mask layer 4 are just opposite to those in the embodiment, that is, the light-transmitting areas in the two lithography mask layers in Embodiment 1 are light-transmitting areas in this embodiment, while the light-opaque areas in the two lithography mask layers in Embodiment 1 are light-transmitting areas in this embodiment. Other structures of the first mask and the second mask of this embodiment can be found in Embodiment 1, and will not be described in detail here.

[0094] Based on the above-mentioned hexagonal honeycomb double-groove lithography mask suitable for positive glue, this embodiment further introduces the production process of GPP diode chip using honeycomb lithography and knife scraping method, which includes the following steps:

[0095] S1, evenly coating photoresist on the etched surface of the original wafer to form a first photoresist layer.

[0096] S2, placing the first mask in a mask aligner, and printing a light-transmitting pattern on the first mask on the first photoresist layer on the etched surface of the original wafer through a photoetching process.

[0097] S3, treating the first photoresist layer after the photoetching treatment in S2 with a developing solution, removing the photoresist in all exposed areas, washing the developing solution containing photoresist impurities with a fixing solution, and drying.

[0098] S4, etching the wafer processed by S3 by dry etching or wet etching, so that etching grooves are formed in the areas of the etched surface of the first patterned wafer that are not covered with photoresist, and the hexagonal etching grooves are enclosed to form a hexagonal chip mesa, and two spaced etching grooves are arranged between any two adjacent chip mesas, and the two etching grooves are separated by a line-shaped cutting surface. After etching, the photoresist on the wafer surface is removed with stripping solution.

[0099] S5, filling glass powder in the etching groove of the wafer surface treated in S4 by knife scraping method, and forming glass passivation protection on the wafer surface and the etching groove after sintering.

[0100] S6, uniformly coating photoresist on the etched surface of the wafer processed in S5 again to form a second photoresist layer.

[0101] S7, placing the second mask in the mask aligner, and printing the light-transmitting pattern on the second mask on the second photoresist layer on the etched surface of the wafer through the overprint process.

[0102] S8, treating the second photoresist layer after the overprint treatment in S7 with a developing solution, removing the photoresist in all exposed areas, washing the developing solution containing photoresist impurities with a fixing solution, and drying.

[0103] S9. Etching the surface of the wafer processed in S8 with buffer oxide etching solution, removing the chip mesa and the glass layer covered on the cutting surface, and exposing the chip mesa and the cutting surface.

[0104] S10, placing the wafer processed in S9 in an evaporation table, performing surface metallization on both surfaces of the wafer, and then performing laser cutting along the cutting surface on the etched surface by using laser cutting equipment to form hexagonal GPP diode chip particles.

[0105] Among them, in the above S1-S10, except that the photoresist in this embodiment is positive glue, and the developer used should also be positive developer that can remove the exposed photoresist, these two differences are different from those in Embodiment 1, and other specific practices can be implemented by referring to the steps S1-S10 in Embodiment 1.

[0106] Since the transparent areas and opaque areas in the first and second photolithography mask layers 2 and 4 are just opposite to those in the embodiment, and the positive and negative properties of the photoresist coated on the wafer are also opposite, the same structure as in the embodiment 1 can still be obtained on the wafer.