Manufacturing method of semiconductor device
A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems that affect device withstand voltage, gates are easy to be broken down, etc., achieve simple process and improve withstand voltage Effect
Active Publication Date: 2022-05-17
SUZHOU ORIENTAL SEMICONDUCTOR CO LTD
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Problems solved by technology
At present, the main problem of using silicon carbide to prepare trench power devices is that a large electric field will be applied to the gate dielectric layer in the gate trench when the device is running, which makes the gate easily broken down and affects the device. pressure
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[0027] The technical solutions of the present invention will be fully described below in conjunction with the accompanying drawings in the embodiments of the present invention. It should be understood that terms such as "having", "comprising" and "including" used herein do not denote the presence of one or more other elements or combinations thereof. At the same time, in order to clearly illustrate the specific implementation of the present invention, the schematic diagrams listed in the accompanying drawings of the specification magnify the thickness of the layers and regions described in the present invention, and the listed figures do not represent the actual size.
[0028] Figure 1-Figure 7 It is a schematic cross-sectional structure diagram of the main technical nodes in the manufacturing process of an embodiment of the manufacturing method of the semiconductor device provided by the present invention. First, as figure 1 As shown, a semiconductor substrate is provided, ...
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The invention discloses a method for manufacturing a semiconductor device, which comprises the following steps of: firstly, simultaneously forming a gate trench and a source trench in the same etching process, and contacting a p-type semiconductor layer and a p-type doped region in the source trench in a self-aligned manner, so that the technical process is simple; secondly, a first insulating layer and a first grid electrode are formed in the lower portion of the grid electrode groove, a second insulating layer and a second grid electrode are formed in the upper portion of the grid electrode groove, the thick first insulating layer can protect the second grid electrode from being broken down easily, the first grid electrode can increase an electric field near the bottom of the grid electrode groove, and the withstand voltage of the semiconductor device is improved; and thirdly, the bottom of the source trench can go deep into the second n-type semiconductor layer, the p-type doped region below the source trench can increase the electric field near the bottom of the source trench, the highest electric field in the semiconductor device is limited near the bottom of the source trench, the gate in the gate trench is protected from being broken down easily, and the withstand voltage of the semiconductor device is improved.
Description
technical field [0001] The invention belongs to the technical field of semiconductor devices, in particular to a method for manufacturing a semiconductor device. Background technique [0002] Silicon carbide has many characteristics different from traditional silicon semiconductor materials. Its energy band gap is 2.8 times that of silicon, and its insulation breakdown field strength is 5.3 times that of silicon. Therefore, in the field of high-voltage power devices, silicon carbide devices can be used relative to silicon materials. Thinner epitaxial layer to achieve the same withstand voltage level of traditional silicon devices, while having lower on-resistance. At present, the main problem of using silicon carbide to prepare trench power devices is that a large electric field will be applied to the gate dielectric layer in the gate trench when the device is running, which makes the gate easily broken down and affects the device. pressure resistance. Contents of the inv...
Claims
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IPC IPC(8): H01L21/336H01L21/28H01L21/04H01L29/06H01L29/08H01L29/423H01L29/78
CPCH01L29/66068H01L21/049H01L21/0475H01L21/0455H01L29/7827H01L29/0623H01L29/4236H01L29/42364H01L29/42368H01L29/0847H01L29/78H01L29/66477H01L29/41766H01L29/407H01L29/7813H01L29/66734H01L29/66727H01L29/66621H01L29/7802H01L21/046H01L29/1608
Inventor 龚轶刘伟毛振东徐真逸
Owner SUZHOU ORIENTAL SEMICONDUCTOR CO LTD