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Semiconductor epitaxial structure, preparation method thereof and semiconductor structure

An epitaxial structure, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of semiconductor device temperature rise, lattice, thermal expansion mismatch, increased interface thermal resistance, etc.

Pending Publication Date: 2022-06-28
DYNAX SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, in the traditional process of growing heteroepitaxial single crystal thin films on SiC substrates, due to the unavoidable lattice and thermal expansion mismatch, defects such as dislocations, pits or grain boundaries are generated, which increase the interface thermal resistance. , causing the temperature of the semiconductor device to rise too fast, seriously affecting the performance, reliability and service life of the semiconductor device

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  • Semiconductor epitaxial structure, preparation method thereof and semiconductor structure
  • Semiconductor epitaxial structure, preparation method thereof and semiconductor structure
  • Semiconductor epitaxial structure, preparation method thereof and semiconductor structure

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Embodiment Construction

[0034] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the related drawings. Preferred embodiments of the present application are shown in the accompanying drawings. However, the application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the specification of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] It wil...

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Abstract

The invention relates to a semiconductor epitaxial structure and a preparation method thereof, and a semiconductor structure, the semiconductor epitaxial structure comprises a substrate and a first transition layer, and the first transition layer is formed on the substrate; wherein the concentration of a first component of the first transition layer changes in a gradient mode in the thickness increasing direction, and the first component is an element of the substrate. The first transition layer with the concentration of the first component changing in the gradient mode in the thickness increasing direction is formed on the substrate, the first component is the element of the substrate, the defects of dislocation, pits or grain boundaries and the like caused by mismatching of crystal lattices and thermal expansion are avoided, the thermal resistance of the epitaxial layer is effectively reduced, and the yield of the epitaxial layer is improved. And the performance, reliability and service life of the manufactured semiconductor device are improved.

Description

technical field [0001] The present invention and the field of semiconductor technology, in particular, relate to a semiconductor epitaxial structure, a preparation method thereof, and a semiconductor structure. Background technique [0002] Semi-insulating silicon carbide (SiC) has the advantages of high thermal conductivity and high resistivity, and has a high maturity in mass production, and is widely used in the preparation of high-frequency, high-power epitaxial structures. For example, for gallium nitride (GaN) electron mobility transistor (High Electron Mobility Transistor, HEMT) epitaxial structures, SiC is still the best substrate choice. [0003] However, in the traditional process of growing heteroepitaxial single crystal thin films on SiC substrates, due to the inevitable mismatch of lattice and thermal expansion, defects such as dislocations, pits or grain boundaries are generated, which increases the interface thermal resistance. , causing the temperature of th...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02H01L29/06H01L29/20H01L29/778
CPCH01L21/02378H01L21/02458H01L21/0251H01L21/0254H01L29/0684H01L29/2003H01L29/778
Inventor 张晖周文龙孔苏苏李仕强谈科伟杜小青
Owner DYNAX SEMICON