Semiconductor device and preparation method thereof

Abstract

The invention provides a semiconductor device and a preparation method thereof. According to the method, an etching stop layer is not grown on the surface of a device, but a first interlayer dielectric layer is directly deposited, and a grinding barrier layer is directly formed on the first interlayer dielectric layer without grinding, so that grinding depression is avoided. The surface topography of the first interlayer dielectric layer and the surface topography of the grinding barrier layer are in a fluctuating state and fit with the surface topography of the device. And when the contact hole is etched, the morphology after etching in unit time is still matched with the surface morphology of the device. The first interlayer dielectric layer does not remain at the bottom of the contact hole, and over-etching is not needed, so that a film layer of the device cannot be broken through, and current leakage is avoided. And a second interlayer dielectric layer is also formed on the grinding barrier layer to serve as a grinding sacrificial layer. Therefore, in the grinding process, under the combined action of the sacrificial layer and the grinding barrier layer, the problem of grinding depression can be effectively relieved, so that the phenomenon that a metal interconnection structure formed subsequently collapses, and consequently a metal connection line is short-circuited is avoided, and the product yield is increased.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method thereof. Background technique [0002] Static random access memory (Static Random-Access Memory, SRAM) is a kind of random access memory, which has the advantages of fast response and low power consumption. like Figure 1-2 The illustrated SRAM includes a first pull-up pipe PU1, a second pull-up pipe PU2, a first pull-down pipe PD1, a second pull-down pipe PD2, a first selection pipe PG1 and a second selection pipe PG2. The source S of the first pull-up transistor PU1, the source S of the second pull-up transistor PU2, the gate of the first selection transistor PG1 and the gate of the second selection transistor PG2 are all connected to the word line WL, and are all connected to the word line WL. Connect to the working voltage terminal VDD. The source S of the first pull-down transistor PD1 and the source S of the s...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a semiconductor device and its preparation method to solve at least one of the problems of how to avoid device leakage current and how to alleviate grinding unevenness

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