Superconducting binary neural network acceleration method and accelerator
A binary neural network and neural network technology, applied in the field of superconducting fast single-flux quantum RSFQ and neural network computing, can solve the problems of limited maximum performance and energy efficiency, and achieve the effect of improving performance and energy efficiency
Pending Publication Date: 2022-08-02
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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However, these designs are based on traditional CMOS implementations, which have limited maximum performance and energy efficiency
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[0041]To implement an efficient BNN accelerator using RSFQ logic, several specific challenges need to be overcome. One challenge is how to design the accumulator using superconducting logic, because RSFQ logic has ultra-deep pipeline characteristics, and the accumulator needs a feedback loop to realize the accumulation operation, which can lead to significant performance degradation. Because the next clock pulse needs to wait a long data transmission delay through the feedback path. In addition, superconducting memory has weak driving ability and poor scalability, so it is also difficult to realize on-chip storage using superconducting RSFQ logic. Specifically, the present invention includes the following key technical points:
[0042] Key point 1, the new binary representation method. Based on the traditional binarization using functions, a new binarization function is proposed. Under this representation, the first layer of BNN can also use the binarized values for infere...
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The invention provides a superconducting binary neural network acceleration method and accelerator, and the method comprises the steps: obtaining all real value weights and real value activations of a first layer of a to-be-operated neural network, respectively taking the real value weights and real value activations as current weights and current activations, and carrying out the binarization of the current weights and the current activations, and obtaining binary weights and binary activations; inputting data pairs formed by all the binary weights and the corresponding binary activations into a plurality of XNOR gates in a neural processing unit so as to complete multiplication operation on each data pair; and accumulating all multiplication operation results through a pure combination accumulation parallel unit, inputting an accumulation result and a preset threshold value into a comparator, and taking a comparison result as binary activation of a next layer until a comparison result of a last layer of the superconductive binary neural network is obtained, and taking the comparison result as an operation result of the superconductive binary neural network. According to the method, the first layer in the BNN can also be subjected to binarization calculation, and the precision is not lost; a feedback loop and a storage circuit are avoided, and the performance of the superconducting BNN is improved.
Description
technical field [0001] The invention relates to the field of superconducting fast single magnetic flux quantum RSFQ and neural network computing, and particularly relates to a superconducting binary neural network acceleration method and an accelerator. Background technique [0002] Superconducting Single Flux Quantum (SFQ) circuit technology is listed as a promising next-generation integrated circuit technology by ITRS. The superconducting RSFQ circuit is a type of SFQ circuit with ultra-high speed and ultra-low power consumption. Studies have confirmed that a simple RSFQ circuit fabricated with sub-micron Josephson junction technology can work at a frequency of up to 770 GHz, which is difficult for semiconductor integrated circuits to achieve. Under the same process conditions, the logic gate delay and bit operation power consumption in the RSFQ circuit are two orders of magnitude lower than the corresponding semiconductor circuits. [0003] The most basic device in the ...
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Login to View More IPC IPC(8): G06F30/331G06N3/04G06N3/06
CPCG06F30/331G06N3/04G06N3/06
Inventor 黄俊英付荣亮张志敏
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI