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Ion implantation method for generating window on dielectric layer

A technology of ion implantation and ion implantation area, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc., and can solve problems such as inability to use manufacturing processes and non-straight contours

Inactive Publication Date: 2005-07-13
WINBOND ELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, chemical wet etching has a high selectivity ratio to photoresist, which can reduce the loss of photoresist, but it is accompanied by severe lateral etching of chemical wet etching, resulting in non-straight contours, which cannot be used actual process

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  • Ion implantation method for generating window on dielectric layer
  • Ion implantation method for generating window on dielectric layer
  • Ion implantation method for generating window on dielectric layer

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Embodiment Construction

[0028] The present invention provides a method for forming openings in a dielectric layer by ion implantation. The dielectric layer includes, for example, at least one dielectric layer, and the upper layer is an ion-free dielectric layer. Now the photoresist layer is used as the mask layer, hydrogen fluoride is used as the chemical vapor phase etching gas, the ion-free oxide layer is used as the ion-free dielectric layer, and the ion-containing oxide layer is used as the ion-containing dielectric layer. Example. Wherein, the photoresist etching rate of this hydrogen fluoride vapor phase etching is small, such as less than 50 angstroms / minute, preferably less than 10 angstroms / minute, and the selectivity ratio of photoresist is large, such as greater than 20, preferably greater than 80.

[0029] Figure 3A to Figure 3E , is a schematic cross-sectional view of the process flow of the method for forming openings in the dielectric layer by ion implantation according to the prese...

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PUM

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Abstract

The invention relates to a method for forming an opening in a dielectric layer by ion implantation, comprising: providing a base; forming an ion-free dielectric layer on the base; forming a mask layer on the ion-free dielectric layer , the mask layer includes a first opening to expose a portion of the ion-free dielectric layer; using the mask layer, an ion implantation step is performed to form an ion implantation region in the ion-free dielectric layer under the first opening, The depth of the ion implantation region does not exceed the thickness of the ion-free dielectric layer; using the mask layer, a chemical vapor phase etching step is performed to etch the ion implantation region of the ion-free dielectric layer to form a second opening; using the mask layer, A dry etching step is performed to etch the remaining ion-free dielectric layer below the second opening to expose a portion of the substrate. The method effectively reduces critical dimension loss and scratches caused by mask layer loss.

Description

technical field [0001] The present invention relates to a semiconductor manufacturing process, in particular to a method for forming an opening (opening) in a dielectric layer (insulator) by using ion implantation, chemical vapor etching, and dry etching. Methods. Background technique [0002] In processes such as deep contact, deep trench and hardmask, the thickness of the oxide layer to be etched becomes deeper and deeper. However, due to the requirement of resolution in the lithography process, the thickness of the photoresist needs to be reduced. If dry etching is used in the whole process, since plasma is used for dry etching, it is easy to have critical dimension loss caused by photoresist loss. This phenomenon is due to the fact that the plasma also etches the photoresist during dry etching. As the thickness of the oxide layer increases, that is, the etching depth increases, the more the photoresist is etched away, resulting in significant loss. Figure 1A is the th...

Claims

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Application Information

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IPC IPC(8): H01L21/3065H01L21/311H01L21/316
Inventor 杨允魁张逸明
Owner WINBOND ELECTRONICS CORP
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