Thin film transistor array and its manufacturing method and display board using same

A technology of thin film transistor and manufacturing method, applied in the field of TFT array, can solve problems such as poor characteristics, and achieve the effects of simplified manufacturing process and high pixel numerical aperture

Inactive Publication Date: 2002-06-12
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this technology cannot be directly transferred to the manufacture of TFT arrays
Furthermore, compared with TFTs, diodes are inherently inferior in high-speed drive characteristics.

Method used

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  • Thin film transistor array and its manufacturing method and display board using same
  • Thin film transistor array and its manufacturing method and display board using same
  • Thin film transistor array and its manufacturing method and display board using same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0119] In this embodiment, a TFT array using a so-called top-gate TFT in which a gate electrode of a TFT is arranged in an upper layer than a channel portion will be described.

[0120] exist Figure 1a as well as Figure 1b The TFT array of this embodiment is shown in . As shown in the figure, the pixel electrode 10 is disposed on the same layer as the channel portion 4a, the source portion 4b, and the drain portion 4c which are semiconductor layers of the TFT, and is integrally formed with them. The pixel electrode 10, the channel portion 4a, the source portion 4b, and the drain portion 4c are made of a semiconductor material imparted with conductivity.

[0121] The TFT array of this example is produced, for example, as follows.

[0122] Such as Figure 2a As shown, on the surface of the cleaned transparent glass substrate 2, a film composed of silicon oxide with a thickness of 0.4 μm is formed as an undercoat layer (protective film) 3 by chemical vapor deposition (CVD), ...

Embodiment 2

[0153] In this embodiment, a TFT array using so-called bottom-gate TFTs in which the gate electrodes of TFTs are arranged in the lower layer of the channel portion will be described.

[0154] The TFT array of this embodiment is shown in Figure 9 middle. As shown in the figure, the pixel electrode 10 is arranged on the same layer as a channel portion 23a, a source portion 23b, and a drain portion 23c which are semiconductor layers of a TFT, and is integrally formed with them. The pixel electrode 10, the channel portion 23a, the source portion 23b, and the drain portion 23c are made of a semiconductor material imparted with conductivity.

[0155] The TFT array of this example is produced, for example, as follows.

[0156] Such as Figure 10a As shown, on the surface of the cleaned transparent glass substrate 2, a film composed of silicon oxide with a thickness of 0.4 μm as an undercoat layer 3 is formed by chemical vapor deposition (CVD), and then by sputtering , a metal la...

Embodiment 3

[0170] In this embodiment, an example of a TFT array using a semiconductor material film also as an insulating element will be described.

[0171] exist Figure 11a as well as Figure 11b The TFT array of this embodiment is shown above. In this embodiment, without processing its shape, the semiconductor material film is separated into each element function of the TFT array. In addition, main elements of the gate signal line 18, the gate electrode 9, and the source signal line 12 are formed by processing the same layer. Therefore, the manufacturing process of the TFT array is further simplified compared with the above-mentioned embodiments.

[0172] The TFT array of this example is produced, for example, as follows.

[0173] Such as Figure 12a As shown, on the cleaned transparent glass substrate 2, a film composed of silicon oxide with a thickness of 0.4 μm as an undercoat layer 3 is formed by chemical vapor deposition (CVD), and then on the undercoat layer 3 , by sputte...

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Abstract

By imparting conductivity to specified regions of a semiconductor material film formed over a substrate, the semiconductor material film, in addition to being processed into channel portions, source portions, and drain portions of TFTs, is processed into conductive elements containing pixel electrodes connected to the drain portions. Regions composed of an intrinsic semiconductor to which impurities have not been added serve as the active layers (channel regions) of the TFTs and regions to which impurities have been added serve as conductive elements. When transparent electrodes are formed, an oxide semiconductor is used.

Description

technical field [0001] The present invention relates to a TFT array in which a plurality of thin film transistors (TFTs) are arranged in a matrix for a typical flat display panel among liquid crystal display panels and electroluminescent (EL) display panels. Improvements to simplify its manufacturing process. Background technique [0002] In these display panels, instead of a simple matrix display panel, an active matrix display panel using thin film transistors (TFTs) such as amorphous silicon and polycrystalline silicon as switching elements for pixel control is arranged. has become widely available. [0003] FIG. 14 shows an example of a TFT array. On an insulating substrate, thin film transistors (TFTs) 71 are arranged in a matrix. The source signal line 75 connected to the source region of the TFT 71 in the same column supplies a source signal from a driver circuit (not shown) to the TFT 71 . The gate signal line 76 connected to the gate electrodes of the TFTs 71 in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1333G02F1/1343G02F1/1368H01L21/77H01L21/84H01L27/12H01L29/786
CPCG02F1/1368G02F1/13439H01L29/7869H01L27/12H01L27/1214H01L27/124G02F1/1333
Inventor 小川一文
Owner PANASONIC CORP
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