High-density NROM-FINFET

Abstract

Semiconductor memory having memory cells, each including first and second conductively-doped contact regions and a channel region arranged between the latter, formed in a web-like rib made of semiconductor material and arranged one behind the other in this sequence in the longitudinal direction of the rib. The rib has an essentially rectangular shape with an upper side of the rib and rib side faces lying opposite. A memory layer is configured for programming the memory cell, arranged on the upper side of the rib spaced apart by a first insulator layer, and projects in the normal direction of the one rib side face over one of the rib side faces so that the one rib side face and the upper side of the rib form an edge for injecting charge carriers from the channel region into the memory layer. A gate electrode is spaced apart from the one rib side face by a second insulator layer and from the memory layer by a third insulator layer, electrically insulated from the channel region, and configured to control its electrical conductivity.

Description

technical field [0001] The invention relates to a semiconductor memory and a method for manufacturing the semiconductor memory. Background technique [0002] Traditional programmable semiconductor memory components have many different designs depending on the application, such as PROM, EPROM, EEPROM, FLASH EEPROM and SONOS, etc.; the differences between these different designs are especially in erasing options, programming capabilities and programming time, retention time, storage Density, and its manufacturing cost; and at present, high-density and economical flash semiconductor memories are especially required. In particular, conventional designs are about NAND and ETOX memory cells, however their storage density needs to be higher than 4F 2 (Where F is the minimum structural size of the semiconductor memory in the manufacturing process). In the document "NROM: A novellocalized trapping, 2-bit nonvolatile Memory Cell" disclosed by B. Eitan et al. in IEEE Electron Device ...

AI Technical Summary

Problems solved by technology

Although the required charge pumps are generally known, they require a considerable surface area of ​​the memory chip, thereby reducing its level of integration and increasing its subsequent manufacturing cost.

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