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Method for analyzing BEOL testing chip on-line failure

A failure analysis and chip technology, applied in electronic circuit testing, single semiconductor device testing, semiconductor/solid-state device testing/measurement, etc., can solve the problems of time-consuming and labor-intensive success rate, inability to optimize, low success rate, etc., to improve analysis efficiency and success rate, improve efficiency and accuracy, avoid the effect of destructive analysis

Inactive Publication Date: 2007-06-20
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology

Moreover, in order to ensure a certain capture rate for commonly used test structures such as open and short (Open&Short), the size of the test structure is generally above 1000 microns. It will be very time-consuming and laborious to search manually and the success rate is very low.
[0003] With the failure analysis method of the test chip in the above prior art, although its final test result can reflect the capture rate of each detection layer, it cannot pass point-to-point for the undetected defects found in failure analysis (failure analysis, hereinafter referred to as FA). program adjustments to optimize
[0004] The existing back end of line (BEOL) test chip online failure analysis method of the existing chip production line has the characteristics of strong destructiveness, low efficiency, and low success rate, and it cannot target the unidentified problems discovered by FA. Detected defects are adjusted and optimized, and there are shortcomings such as insufficient feedback for detection program optimization

Method used

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  • Method for analyzing BEOL testing chip on-line failure
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Embodiment Construction

[0011] Fig. 1 is a schematic flow chart of the present invention. As shown in Figure 1, firstly, a silicon wafer defect detection machine for any layer of metal line engineering is used for defect detection on the silicon wafer, and the detected defects are classified, and 5-10 points are selected at different positions of the silicon wafer It is easy to find defects with a size less than 5 microns under the scanning electron microscope, and generate the KRF format result file ins.krf; then use the characteristic tester to test the open circuit and short circuit of the silicon wafer, and also generate the KRF format failure position file pcm. krf, in the above process, it is necessary to ensure that the silicon wafer origin and the chip origin of ins.krf and pcm.krf are consistent; Figure 2 is a schematic diagram of multiple virtual defects generated by splitting the failure structure of the characteristic test. As shown in Figure 2, each failed test structure in pcm.krf is de...

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Abstract

A method for analyzing on-line failure of BEOL test chip includes generating multiple virtual defects by detaching failure structure of characteristic test and integrating these defects to be manner detecting defect result for realizing seek and confirmation as well as analysis on failure position by automatic-scanning electronic microscope.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for online failure analysis of a BEOL test chip in the semiconductor process. Background technique [0002] The failure analysis of the test chip plays a very important role in the semiconductor process, and is generally performed after the last layer of metal lines is completed. The methods used are mainly De-Layer by chemicals, Polishing by chemical mechanical grinding, and destructive means such as Focused Ion Beam (FIB). Moreover, in order to ensure a certain capture rate for commonly used test structures such as open and short (Open&Short), the size of the test structure is generally more than 1000 microns. It will be very time-consuming and laborious to search manually and the success rate is very low. [0003] With the failure analysis method of the test chip in the above prior art, although its final test result can reflect the capture rate of each detect...

Claims

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Application Information

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IPC IPC(8): G01R31/00G01R31/02G01R31/26G01R31/28H01L21/66
Inventor 殷建斐
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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