Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process

a technology of metal oxide dielectric material and fabrication process, which is applied in the direction of coating, capacitor, chemical vapor deposition coating, etc., can solve the problems of shortened battery life of portable devices such as cellular telephones and laptop computers, leakage of charge carriers, and longer functions as effective insulators, so as to achieve the effect of driving current and high carrier mobility

a technology of metal oxide dielectric material and fabrication process, which is applied in the direction of coating, capacitor, chemical vapor deposition coating, etc., can solve the problems of shortened battery life of portable devices such as cellular telephones and laptop computers, leakage of charge carriers, and longer functions as effective insulators, so as to achieve the effect of driving current and high carrier mobility

US20050042846A1Inactive Publication Date: 2005-02-24GREEN MARTIN L +1
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  • Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process
  • Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process
  • Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process

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Embodiment Construction

[0023] The present invention will be understood from the following detailed discussion of exemplary embodiments which is presented in connection with the accompanying drawings.

[0024] The present invention provides a method of fabricating a semiconductor device having a metal oxide dielectric layer with a high dielectric constant (high-K), annealed with a buffered anneal process. An interfacial layer such as SiO2 is optionally present between the metal oxide layer and substrate during the buffered anneal process. The buffered anneal process anneals the metal oxide dielectric layer in an oxygen atmosphere in which the partial pressure of oxygen is controlled as a function of anneal temperature such that annealing occurs under conditions at or below the thermodynamic chemical equilibrium for SiO / SiO2 and at or above the thermodynamic chemical equilibrium for the metal oxide dielectric layer.

[0025] In the following description, specific details such as layer thicknesses, material comp...

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Abstract

A method of forming an annealed high-K metal oxide transistor gate structure is disclosed. A metal oxide layer is formed over a semiconductor substrate. The metal oxide layer undergoes a buffered annealed process in an oxygen atmosphere to anneal the metal oxide layer at or below the thermodynamic chemical equilibrium of SiO / SiO2 and at or above the thermodynamic chemical equilibrium of the metal oxide layer.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to the field of semiconductor devices, and more specifically to a fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant. [0003] 2. Description of the Related Art [0004] As the dimensions of the MOS transistor are scaled down, the thickness of its gate oxide, typically SiO2, decreases accordingly. Reducing the SiO2 layer to an ultrathin thickness results in charge carrier leakage by tunneling conduction as the ultrathin SiO2 gate oxide layer no longer functions as an effective insulator. [0005] Tunneling conduction also causes a faster dissipation of stored charge resulting in, for example, shortened battery life in portable devices such as cellular telephones and laptop computers. Typically, the gate dielectric layer used in a MOS transistor is an SiO2 layer which has a dielectric constant of 3.9. Alternative gate oxide m...

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Application Information

Patent Timeline
24 Feb 2005
Publication
US20050042846A1
IPC
H01L21/02; H01L21/28; H01L21/314; H01L21/316; H01L29/51
CPC
H01L21/02178; H01L21/02263; H01L21/02304; H01L21/02337; H01L21/28185; H01L29/518; H01L21/31612; H01L21/31616
Inventors
GREEN, MARTIN L.; WILK, GLEN D.