Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process
Patent Information
- Authority / Receiving Office
- US ยท United States
- Current Assignee / Owner
- GREEN MARTIN L
- Publication Date
- 2005-02-24
- Estimated Expiration
- Not applicable ยท inactive patent
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Abstract
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to the field of semiconductor devices, and more specifically to a fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant.
[0003] 2. Description of the Related Art
[0004] As the dimensions of the MOS transistor are scaled down, the thickness of its gate oxide, typically SiO2, decreases accordingly. Reducing the SiO2 layer to an ultrathin thickness results in charge carrier leakage by tunneling conduction as the ultrathin SiO2 gate oxide layer no longer functions as an effective insulator.
[0005] Tunneling conduction also causes a faster dissipation of stored charge resulting in, for example, shortened battery life in portable devices such as cellular telephones and laptop computers. Typically, the gate dielectric layer used in a MOS transistor is an SiO2 layer which has a dielectric constant of 3.9. Alternative gate oxide m...