Method to chemically remove metal impurities from polycide gate sidewalls

Abstract

An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment also relates to a system that achieves the process. An embodiment also relates to a gate stack structure that provides a composition that resists the redeposition of metal during processing and field use.

Description

[0001] This application is a Divisional of U.S. application Ser. No. 10 / 929,933, filed Aug. 30, 2004, which is a Divisional of U.S. application Ser. No. 09 / 945,553, filed Aug. 30, 2001, both of which are incorporated herein by reference.FIELD OF THE INVENTION [0002] The present invention relates to semiconductor device fabrication. In particular, the present invention relates to fabrication of a metal electrode in a gate structure such as a tungsten word line, and to a process of resisting cross-contamination of volatilized metals during fabrication and field use. BACKGROUND OF THE INVENTION [0003] Integrated circuit technology relies on transistors to formulate functional circuits. The complexity of these circuits requires the use of an ever-increasing number of transistors. During the manufacture of some integrated circuits, field effect transistor (FET) gate electrodes and gate electrode interconnects are etched from an electrically conductive layer that covers other circuitry. F...

AI Technical Summary

Benefits of technology

This approach significantly reduces metal redeposition, minimizing leakage pathways and enhancing the reliability and longevity of semiconductor devices by maintaining lower sheet resistance and smaller topology, thus addressing the challenges of miniaturization and operational speed requirements.

Problems solved by technology

The complexity of these circuits requires the use of an ever-increasing number of transistors.

However, faster operational speeds and low gate stack heights that are desirable for some applications could not be obtained using the polysilicon layer.

One challenge in dynamic random access memory (DRAM) technology is to get the memory cell to hold a charge for longer periods of time.

For example, increased temperature will increase leakage.

Further, impurities etc. in the source and drain, and defects in or near the gate will also increase leakage.

Another cause of leakage include sub-threshold leakage, which is backward tunneling of charge from the source to the drain.

This redeposition of metal impurities is one source for many leakage pathways.

However, W may volatilize during processing and recombine with the substrate in a manner that poisons active areas.

During oxidation-promoting processes, the oxidation of silicon, including polysilicon, is self limiting to a degree.

Accordingly, the tungsten may oxidize to a significant amount and even vaporize during any of these oxidation-promoting processes.

Further, some metal may volatilize and recombine with portions of the semiconductor in ways that are detrimental to both device yield and field use life.

Images