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Memory with high dielectric constant antifuses and method for using at low voltage

a memory and dielectric constant technology, applied in the field of nonvolatile memory array programming and reading, can solve the problems of antifuses and diodes made from films of silicon dioxide that have already been made just a few atoms thick, not to be made thinner, etc., to achieve low voltage, short antifuse, and reliable reading and writing

Inactive Publication Date: 2007-03-29
SANDISK TECH LLC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention is about methods of forming and programming an array of nonvolatile memory cells each comprising an antifuse in series with a diode. The invention takes advantage of the one-way nature of the diode and uses materials that allow for lower voltage operation. By using a material with a higher dielectric constant than silicon dioxide, the vertical dimension of the memory cell can be reduced, and the write voltage and read voltage can be reduced. The invention also ensures that unselected memory cells are not programmed or otherwise disturbed. The technical effects of the invention are that it reduces power consumption and allows for reliable reading and writing of memory cells at lower voltages.

Problems solved by technology

But antifuses and diodes made from films of silicon dioxide have already been made just a few atoms thick, and can not be made thinner.

Method used

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  • Memory with high dielectric constant antifuses and method for using at low voltage
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  • Memory with high dielectric constant antifuses and method for using at low voltage

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Embodiment Construction

[0026] When developing improvements in integrated circuit memories, it is desirable to reduce the cost of manufacturing while improving operating speed, reducing power consumption, and maintaining a good useful lifetime of the devices. The present invention is directed to memory arrays in which memory cells are formed from a diode and an antifuse connected in series. Preferred embodiments orient the diode and antifuse in a vertical stack between word lines and bit lines.

[0027] A critical requirement for shrinking memory devices to deep submicron sizes is to reduce the voltage levels required to write and read the memory cells. For example, whereas the prior art programming voltage illustrated in FIG. 1 is about 9 volts, the present invention will allow programming in the range of 3 to 5 volts. Read voltage can similarly be reduced to about 1 to 1.5 volts. Reducing the required read and write voltages of the memory cells also allows shorter channel length CMOS devices to be used in ...

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Abstract

A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using antifuse materials having higher dielectric constant and higher acceleration factor than silicon dioxide, and by using diodes having lower band gaps than silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example hafnium silicon oxynitride or hafnium silicon oxide are particularly effective. Diode materials with band gaps lower than silicon, such as germanium or a silicon-germanium alloy are particularly effective.

Description

RELATED APPLICATIONS [0001] This application relates to concurrently filed U.S. application Ser. No. ______ (attorney docket number MA-153) by N. Johan Knall, entitled “REVERSE-BIAS METHOD FOR WRITING MEMORY CELLS IN A MEMORY ARRAY”; and to U.S. application Ser. No. ______, (attorney docket number MA-154) by James M. Cleeves, entitled “MEMORY CELL WITH HIGH-K ANTIFUSE FOR REVERSE BIAS PROGRAMMING”; all filed herewith and incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] The invention relates to programming and reading an array of nonvolatile memory cells each comprising a diode in series with an antifuse. [0003] Integrated circuit memories are typically large arrays of memory cells connected between bit lines and word lines. In order to achieve reliable programming and reading of the memory cells within the array, memory cells selected to be programmed or read must be isolated from memory cells that are not selected. Also, as it becomes increasingly important to mi...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L27/10H01L21/82
CPCG11C17/16H01L23/5252H01L27/101H01L45/12H01L45/04H01L45/146G11C17/00H01L2924/0002H01L2924/00H10N70/801H10N70/20H10N70/8833H10B20/25
Inventor YANG, XIAOYUSCHEUERLEIN, ROY E.LI, FENGMEEKS, ALBERT T.
Owner SANDISK TECH LLC
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