Return-to-hold switching scheme for dac output stage

Abstract

A novel clock control circuit completely removes the inter-symbol interference (ISI) in the DAC output waveform without any significant increase in power consumption and silicon area of the DAC. The novel circuit does not increase the requirement for slew rate and bandwidth of the amplifier.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of Invention[0002]This invention relates to mixed-signal converters of the current steering type, and more particularly, to sigma-delta digital-to-analog converter that employs a continuous-time current-to-voltage circuit in the output stage.[0003]2. Discussion of Prior Art[0004]Current steering topology is a commonly used approach in industry to realize digital-to-analog converters. Due to its simplicity and flexibility, this topology is employed in a large combination of high speed or high resolution applications. FIG. 1 illustrates a typical implementation of a 16-level thermometer-code current steering DAC 100. The DAC consists of a bank of current steering cells 102, 104, 106, and 108, amplifier 110, a pair of feedback resistors 112 and 114, and in some cases a pair of capacitors, C1116 and C2118. Capacitors 116 and 118 effectively slow down the step output waveform to help reduce the amplifier slew rate requirement. The control bits an...

AI Technical Summary

Benefits of technology

The present invention provides a circuit and method for eliminating inter-symbol interference error in a current steering DAC. The circuit includes a feedback control system that disconnects the feedback resistors and current cells, creating a hold period to hold the output voltage when the I-to-V amplifier is not connected to the current cells. The circuit also uses the I-to-V amplifier as a buffer to maintain a constant output voltage level during the hold period. The method involves disconnecting the feedback resistors and current cells, connecting the feedback resistors together to form a resistor string across the output stage, and using the I-to-V amplifier as a buffer to hold the output voltage. The invention does not increase power consumption or require a larger circuit area.

Problems solved by technology

Mercer's techniques resulted in AC distortion equal to high power DACs with dissipation as much as 10 times larger.

A very well understood problem associated with current steering DAC is the inter-symbol-interference (ISI).

This ISI problem is the result of un-equal rise and fall time in the waveform of the current pulse delivered to the output by each current cell.

The net effect is a major degradation in the total harmonic distortion (THD) and noise performance of the DAC.

The major drawbacks of this technique include a high slew rate, bandwidth requirement and high power consumption in the amplifier; additional high frequency content introduced as the result of returning to the zero state.

Further, the subsequent filtering stage of the DAC will have to be very linear, a challenging task in its own, to avoid distortions that may cause by such a high dynamic output from the DAC.

This addition doubles the silicon area, consumes twice the amount of power and complicates the clock scheme and data synchronization between the digital and analog interface of the DAC.

It has been known that this type of circuit cannot eliminate ISI completely.

Further, when the logic makes a transition, it draws a large current spike from the supply making it not suitable for low power consumption implementation.

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