Transistor, fabricating method thereof and flat panel display therewith

Abstract

A transistor includes a substrate, an active region including a source region, a channel region, and a drain region which are crystallized using an SGS crystallization method and are formed on the substrate so that a grain size of a first annealed portion and a second annealed portion are different from each other, a gate insulating layer formed on the active region, and a gate electrode formed on the gate insulating layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the benefit of Korean Application No. 2006-138322 filed on Dec. 29, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]Aspects of the present invention relate to a transistor, a fabricating method thereof, and a flat panel display device therewith. More particularly, aspects of the present invention relate to a transistor, a fabricating method, and a flat panel display device, wherein an amorphous silicon layer formed on an insulating substrate is crystallized into a polycrystalline silicon layer using an SGS (Super Grain Silicon) crystallization method, whereby the substrate undergoes a first annealing process by absorbing or diffusing an extremely small amount of metal catalysts into a capping layer as the substrate undergoes a first heat treatment in order to control the concentration of the ...

AI Technical Summary

Benefits of technology

[0012]Aspects of the present invention are directed to controlling the concentration of the metal catalyst left in a polycrystalline silicon layer when an amorphous silicon layer formed on an insulating substrate is crystallized into a polycrystalline silicon layer using an SGS (Super Grain Silicon) crystallization method.

Problems solved by technology

However, if the amorphous silicon is deposited directly on a substrate by the chemical vapor deposition method and the like, the amorphous silicon layer containing about 12% of hydrogen is formed, which has low electron mobility.

In addition, if the amorphous silicon layer of low electron mobility is crystallized into a silicon layer with a crystalline structure having high electron mobility, the silicon layer can be damaged by an explosion of the hydrogen contained therein.

However, the solid phase crystallization has disadvantages in that the process time is too long, and the substrate can be deformed easily due to the high temperature heat treatment occurring over a long time.

The excimer laser crystallization has disadvantages in that the process requires an expensive laser device, and the interfacial property between a semiconductor layer and a gate insulating layer is poor because extrusions are generated on a polycrystallized surface.

The metal induced crystallization or the metal induced lateral crystallization have disadvantages in that a leak (or leakage) current of a semiconductor layer of a thin film transistor increases because metal catalysts are left in the polycrystalline silicon layer.

Consequently, the characteristics of various flat panel display devices using the silicon layer as a switching transistor or a driving transistor of the above processes are poor.

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