Semiconductor device reducing leakage current of transistor

Abstract

A semiconductor device includes: a first transistor having a control electrode coupled to an input node receiving a signal synchronized with a clock, a first conductive electrode coupled to an output node, and a second conductive electrode; a second transistor having a control electrode coupled to the input node, a first conductive electrode coupled to the output node, and a second conductive electrode coupled to a power supply node; and a first switch element connected between the power supply node and the second conductive electrode of the second transistor and turned on and off based on a first control signal indicating a detection result of a frequency of the clock.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a semiconductor device, in particular, a semiconductor device that reduces a leakage current of a transistor.[0003]2. Description of the Background Art[0004]Examples of a technique of reducing a leakage current of a transistor may include an MTCMOS (Multi Threshold Voltage Complementary Metal Oxide Semiconductor) circuit that reduces a leakage current in a standby state, and a VTCMOS (Variable Threshold Voltage Complementary Metal Oxide Semiconductor) circuit that reduces a leakage current in an operating state.[0005]As one example of the MTCMOS circuit, for example, Japanese Patent Laying-Open No. 11-284493 discloses the following configuration. That is, in a master-slave flip-flop including a master flip-flop and a slave flip-flop, the master flip-flop is an inverter constituted of a transistor having a low threshold value and connected to a power supply which can be interrupted. Thus,...

AI Technical Summary

Benefits of technology

[0010]One object of the present invention is to provide a semiconductor device capable of reducing a leakage current of a transistor in an operating state.

[0011]Another object of the present invention is to provide a semiconductor device capable of suppressing increase in area due to wiring in a configuration for reducing a leakage current of a transistor.

[0013]According to the aspect of the present invention, the power supply voltage is controlled whether or not to be supplied to the second transistor or the back gate potential at the second transistor is changed in accordance with an operating speed of the semiconductor device, so that a driving capability of the semiconductor device can be changed.

[0014]Thus, it is possible to reduce a leakage current of a transistor in an operating state.

Problems solved by technology

However, the configuration disclosed in each of Japanese Patent Laying-Open Nos. 11-284493 and 2002-110920 is merely one example of the MTCMOS circuit and, therefore, is not intended to reduce a leakage current in an operating state.

Consequently, there arises a problem that if the flip-flop circuit is operated at a low speed, a rate of power consumption due to a leakage current with respect to power consumption in the operating state disadvantageously increases.

Consequently, there arises a problem that a semiconductor device disadvantageously increases in area.

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