Non-volatile memory structure

Abstract

A non-volatile memory cell utilizes a programmable conductor random access memory (PCRAM) structure instead of a polysilicon layer for a floating gate. Instead of storing or removing electrons from a floating gate, the programmable conductor is switched between its low and high resistive states to operate the flash memory cell. The resulting cell can be erased faster and has better endurance than a conventional flash memory cell.

Description

FIELD OF THE INVENTION[0001]The present invention relates to the field of semiconductor memory devices and, more particularly, to a flash memory device.BACKGROUND OF THE INVENTION[0002]A nonvolatile memory is a type of memory that retains stored data when power is removed. There are various types of nonvolatile memories including e.g., read only memories (ROMs), erasable programmable read only memories (EPROMs), and electrically erasable programmable read only memories (EEPROMs), and flash memory.[0003]Flash memory is often used where regular access to the data stored in the memory device is desired, but where such data is seldom changed. For example, computers often use flash memory to store firmware (e.g., a personal computer's BIOS). Peripheral devices such as printers may store fonts and forms on flash memory. Wireless communications devices such as cellular and other wireless telephones use flash memory to store data and their operating systems. Portable electronics such as dig...

AI Technical Summary

Benefits of technology

"The present invention is about a new type of flash memory cell that uses a programmable conductance random access memory structure instead of traditional polysilicon layers. This results in a cell that can be erased faster and has better endurance than conventional flash memory. The technical effect of this invention is to provide a more efficient and durable flash memory cell."

Problems solved by technology

The erase operation requires high voltages and is relatively slow.

The high erase voltages are a fundamental problem arising from the high electron affinity of bulk silicon or large grain polysilicon particles used as the floating gate.

This creates a very high tunneling barrier.

This results in long erase times since the net flux of electrons leaving the gate is low.

In addition, other phenomena result as a consequence of this very high negative voltage.

Hole injection into the oxide is experienced which can result in erratic over erase, damage to the gate oxide itself, and the introduction of trapping states.

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