Low-voltage punch-through transient suppressor employing a dual-base structure

USRE38608E1Inactive Publication Date: 2004-10-05SEMTECH CORP
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Patent Information

Authority / Receiving Office
US · United States
Current Assignee / Owner
Publication Date
2004-10-05
Estimated Expiration
Not applicable · inactive patent

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Abstract

A punch-through diode transient suppression device has a base region of varying doping concentration to improve leakage and clamping characteristics. The punch-through diode includes a first region comprising an n+ region, a second region comprising a p- region abutting the first region, a third region comprising a p+ region abutting the second region, and a fourth region comprising an n+ region abutting the third region. The peak dopant concentration of the n+ layers should be about 1.5E18 cm.sup.-3, the peak dopant concentration of the p+ layer should be between about 1 to about 5 times the peak concentration of the n+ layer, and the dopant concentration of the p- layer should be between about 0.5E14 cm.sup.-3 and about 1.OE17 cm.sup.-3. The junction depth of the fourth (n+) region should be greater than about 0.3 .mu.m. The thickness of the third (p+) region should be between about 0.3 .mu.m and about 2.0 .mu.m, and the thickness of the second (p-) region should be between about 0.5 .mu.m and about 5.0 .mu.m.
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Description

BACKGROUND OF THE INVENTION1. Field of the InventionThe present invention relates to semiconductor devices. More particularly, the present invention relates to a low-voltage punch-through transient suppressor employing a dual base structure.2. The Prior ArtElectronic circuitry which is designed to operate at supply voltages less than 5 volts are extremely susceptible to damage from overvoltage conditions caused by electrostatic discharge, inductively coupled spikes, or other transient conditions from its operating environment. The current trend of the reduction in circuit operating voltage dictates a corresponding reduction in the maximum voltage that the circuitry can withstand without incurring damage. As operating voltages drop below 5 volts to 3.3 volts and below it becomes necessary to clamp transient voltage excursions to below five volts.The most widely used device currently in use for low voltage protection is the reversed biased p+n+ zener diode. See O. M. Clark, "Transient...

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Embodiment Construction

Those of ordinary skill in the art will realize that the following description of the present invention is illustrative only and not in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons.

Reversed biased p+n+ zener diodes are currently the most widely-used devices for low voltage protection. These devices perform satisfactorily at voltages of 5 volts and above but exhibit very large leakage currents and high capacitance, two major drawbacks, when designed to clamp below 5 volts. FIG. 1. depicts the impurity doping profile of a typical low voltage pn junction device.

The n+p+ uniform base punch-through diode is a second device capable of clamping low voltages. While the leakage and capacitance characteristics of the punch-through diode are superior to the conventional pn diode, the punch-through diode has poor clamping characteristics at high currents. The doping profile of a low voltage n+pn+ uniform base punch-through diode is...