Low-voltage punch-through transient suppressor employing a dual-base structure

Abstract

A punch-through diode transient suppression device has a base region of varying doping concentration to improve leakage and clamping characteristics. The punch-through diode includes a first region comprising an n+ region, a second region comprising a p- region abutting the first region, a third region comprising a p+ region abutting the second region, and a fourth region comprising an n+ region abutting the third region. The peak dopant concentration of the n+ layers should be about 1.5E18 cm.sup.-3, the peak dopant concentration of the p+ layer should be between about 1 to about 5 times the peak concentration of the n+ layer, and the dopant concentration of the p- layer should be between about 0.5E14 cm.sup.-3 and about 1.OE17 cm.sup.-3. The junction depth of the fourth (n+) region should be greater than about 0.3 .mu.m. The thickness of the third (p+) region should be between about 0.3 .mu.m and about 2.0 .mu.m, and the thickness of the second (p-) region should be between about 0.5 .mu.m and about 5.0 .mu.m.

Description

BACKGROUND OF THE INVENTION1. Field of the InventionThe present invention relates to semiconductor devices. More particularly, the present invention relates to a low-voltage punch-through transient suppressor employing a dual base structure.2. The Prior ArtElectronic circuitry which is designed to operate at supply voltages less than 5 volts are extremely susceptible to damage from overvoltage conditions caused by electrostatic discharge, inductively coupled spikes, or other transient conditions from its operating environment. The current trend of the reduction in circuit operating voltage dictates a corresponding reduction in the maximum voltage that the circuitry can withstand without incurring damage. As operating voltages drop below 5 volts to 3.3 volts and below it becomes necessary to clamp transient voltage excursions to below five volts.The most widely used device currently in use for low voltage protection is the reversed biased p+n+ zener diode. See O. M. Clark, "Transient...

AI Technical Summary

Benefits of technology

The transient suppressor device of the present invention comprises a n+p-p+n+ punch-through diode. It is a device which can clamp at low voltages and have leakage and capacitance characteristics superior to those of prior-art transient suppressors. The punch-through diode o

Problems solved by technology

Electronic circuitry which is designed to operate at supply voltages less than 5 volts are extremely susceptible to damage from overvoltage conditions caused by electrostatic discharge, inductively coupled spikes, or other transient conditions from its operating environment.

These devices perform well at voltages of 5 volts and above but run into problems when scaled to clamp below 5 volts.

The two major drawbacks incurred by using this device structure are very large leakage currents and high capacitance.

These detrimental characteristics increase power consumption and restrict operating frequency.

These devices exhibit much improved leakage and capacitance characteristics over the conventional pn diode but suffer from poor clamping characteristics at high currents.

If the designer tries to improve clamping to protect circuitry under industry standard surge conditions by increasing die area, the results are devices which are too large to produce economically.

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