Semiconductor device and manufacturing method thereof

Abstract

A semiconductor apparatus and manufacturing method thereof are disclosed. The semiconductor apparatus comprises the steps of forming, on a surface of a semiconductor substrate, an MOS transistor including a drain region and a source region each formed of an impurity diffusion region, forming an insulation film on the semiconductor substrate, selectively forming contact holes in the insulation film, embedding, into the contact hole, a capacitor contact plug having a lower end which is in contact with one of the drain region and the source region of the MOS transistor, forming a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode, and forming an electric wire for establishing a connection between the upper electrode of the ferroelectric capacitor and an upper surface of the capacitor contact plug.

Description

technical field [0001] The invention relates to a semiconductor device with a memory cell array in which the insulating film of a capacitor for information storage adopts a composite oxide and a manufacturing method thereof, in particular to a ferrielecric random access memory (FRAM) in which a capacitor insulating film adopts a ferroelectric ) structure and method of forming the connection wiring part between the cell transistor and the cell capacitor, the bit line contact part and the memory cell, and a dynamic memory cell with a high dielectric constant dielectric (dielectric) used for the capacitor insulation film (capacitor insulation film) Structure of a memory cell of a dynamic random access memory (DRAM) of an array and a method of forming the same. Background technique [0002] In recent years, a non-volatile ferroalactic memory unit (non-volatile ferroalactic memory aell) that uses a perovskite structure or a layered perovskite structure to form a ferroelectric thi...

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Problems solved by technology

[0010] The advantage of the 1T / 1C structure is that it can achieve the same high integration as DRAM, but its disadvantage is that in order to realize a memory cell with a small characteristic dispersion, it is necessary to suppress the dispersion of the ferroelectric characteristics of the memory cell and the dispersion of deterioration, so it is difficult to improve the qualification. rate and component reliability

[0011] The disadvantage of the 2T / 2C structure is that it must have twice the area of ​​the 1T / 1C structure, but due to the relatively large margin of characteristics, it is easy to improve the yield and component reliability

For the same reason, once voids are formed in the electrode film and the density decreases, the problem arises that the film resistance increases and the operating speed becomes slower.

[0043] In this way, in the conventional ferroelectric memory, it is difficult to prevent the deterioration of the characteristics of the ferroelectric capacitor, and it is difficult to combine the process

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